From patchwork Mon Oct 7 08:34:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 2995141 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6F1A7BF924 for ; Mon, 7 Oct 2013 09:01:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CC1F0200DC for ; Mon, 7 Oct 2013 09:01:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9CCB7200CF for ; Mon, 7 Oct 2013 09:01:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 95157E711D for ; Mon, 7 Oct 2013 02:01:43 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-bk0-f41.google.com (mail-bk0-f41.google.com [209.85.214.41]) by gabe.freedesktop.org (Postfix) with ESMTP id 897B8E61CF for ; Mon, 7 Oct 2013 01:37:17 -0700 (PDT) Received: by mail-bk0-f41.google.com with SMTP id na10so2477435bkb.14 for ; Mon, 07 Oct 2013 01:37:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Uva9mBvkZLSqIsKgJhqSgxyywlbmnH2LGwkBfAufSuo=; b=qs6ykkzs72xTcCk9RNTNvhOHIVERuh5Pr+3Vjihafu2fpLOn6rqm4ZNDdAEvKcXFn5 +xswlrCnGdqZrVEr8iopScXrGAM6pTltvM7X2skQaAT5HcabFAWvUtElbFNLWp1hlAIE 9Cs5ziAvH2xUqhKyJrvpkXfpyx4eaSXMRoU3lygt5fTVwF/NCmGDl6gA+S1KSC8LiKLu NGN0+mcwDwcxwhtKtA/gKVZW7SJbu925OhuiprxDsUvAp9DoUWgsoOa8aUqmG42bb6p5 P2oJskVDiOZfuSXA9EJmushoZVnpi7i46W7it/b4nPhINbPBqm+hzLNoFM7GCnk6h6lS OT3w== X-Received: by 10.204.121.201 with SMTP id i9mr26146058bkr.13.1381135036698; Mon, 07 Oct 2013 01:37:16 -0700 (PDT) Received: from localhost (port-46445.pppoe.wtnet.de. [46.59.230.36]) by mx.google.com with ESMTPSA id pn6sm16321757bkb.14.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 07 Oct 2013 01:37:16 -0700 (PDT) From: Thierry Reding To: dri-devel@lists.freedesktop.org Subject: [PATCH v2 20/27] drm/tegra: hdmi: Rename tegra{2, 3} to tegra{20, 30} Date: Mon, 7 Oct 2013 10:34:37 +0200 Message-Id: <1381134884-5816-21-git-send-email-treding@nvidia.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1381134884-5816-1-git-send-email-treding@nvidia.com> References: <1381134884-5816-1-git-send-email-treding@nvidia.com> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Everything related to Tegra uses Tegra20 and Tegra30 instead of Tegra2 and Tegra3, respectively. Rename the TMDS arrays in the HDMI driver for consistency. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/hdmi.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c index 9bd912c..68ab00d 100644 --- a/drivers/gpu/drm/tegra/hdmi.c +++ b/drivers/gpu/drm/tegra/hdmi.c @@ -145,7 +145,7 @@ struct tmds_config { u32 peak_current; }; -static const struct tmds_config tegra2_tmds_config[] = { +static const struct tmds_config tegra20_tmds_config[] = { { /* slow pixel clock modes */ .pclk = 27000000, .pll0 = SOR_PLL_BG_V17_S(3) | SOR_PLL_ICHPMP(1) | @@ -178,7 +178,7 @@ static const struct tmds_config tegra2_tmds_config[] = { }, }; -static const struct tmds_config tegra3_tmds_config[] = { +static const struct tmds_config tegra30_tmds_config[] = { { /* 480p modes */ .pclk = 27000000, .pll0 = SOR_PLL_BG_V17_S(3) | SOR_PLL_ICHPMP(1) | @@ -807,11 +807,11 @@ static int tegra_output_hdmi_enable(struct tegra_output *output) num_tmds = ARRAY_SIZE(tegra114_tmds_config); tmds = tegra114_tmds_config; } else if (of_device_is_compatible(node, "nvidia,tegra30-hdmi")) { - num_tmds = ARRAY_SIZE(tegra3_tmds_config); - tmds = tegra3_tmds_config; + num_tmds = ARRAY_SIZE(tegra30_tmds_config); + tmds = tegra30_tmds_config; } else { - num_tmds = ARRAY_SIZE(tegra2_tmds_config); - tmds = tegra2_tmds_config; + num_tmds = ARRAY_SIZE(tegra20_tmds_config); + tmds = tegra20_tmds_config; } for (i = 0; i < num_tmds; i++) {