From patchwork Mon Oct 28 10:39:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shirish S X-Patchwork-Id: 3107121 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CF2CFBF924 for ; Tue, 29 Oct 2013 10:26:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 90AAE2030E for ; Tue, 29 Oct 2013 10:26:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B56D320212 for ; Tue, 29 Oct 2013 10:26:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4820EEA78; Tue, 29 Oct 2013 03:26:14 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) by gabe.freedesktop.org (Postfix) with ESMTP id BE3E1E77A9 for ; Mon, 28 Oct 2013 03:19:14 -0700 (PDT) Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MVD00FCVJBMCCI0@mailout4.samsung.com> for dri-devel@lists.freedesktop.org; Mon, 28 Oct 2013 19:19:01 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.122]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 76.45.08406.51A3E625; Mon, 28 Oct 2013 19:19:01 +0900 (KST) X-AuditID: cbfee68e-b7f416d0000020d6-56-526e3a1549ad Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id ED.31.09687.51A3E625; Mon, 28 Oct 2013 19:19:01 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MVD006IGJBFPP80@mmp1.samsung.com>; Mon, 28 Oct 2013 19:19:01 +0900 (KST) From: Shirish S To: dri-devel@lists.freedesktop.org, inki.dae@samsung.com, devicetree@vger.kernel.org Subject: [PATCH 3/3] drm: exynos: hdmi: Add dt support for hdmiphy settings Date: Mon, 28 Oct 2013 16:09:15 +0530 Message-id: <1382956755-1318-4-git-send-email-s.shirish@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1382956755-1318-1-git-send-email-s.shirish@samsung.com> References: <1382956755-1318-1-git-send-email-s.shirish@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDLMWRmVeSWpSXmKPExsWyRsSkSlfUKi/IYPJOYYv5R86xWlz5+p7N YtL9CSwWS69fZLKYNnsjo8XdDWcZLZp2HGSzmDH5JZsDh8eaeWsYPWY3XGTxuN99nMmjb8sq Ro/Pm+QCWKO4bFJSczLLUov07RK4MnZ/OMdaME2vomtbRgPjL5UuRk4OCQETiYVTprBD2GIS F+6tZ+ti5OIQEljKKPH00D4mmKIXyxexQyQWMUo8m9/EBOHMZpJ4+ms3G0gVm4C6xMXJq5lB bBGBcImpe/4ygxQxCzQxSnS+62IFSQgLeEuc2rEIbCyLgKrE1M5FjCA2r4CLRNusdywQ6xQl up9NABvKKeAq0fP/JJgtBFQzc/N0sPskBJaxS5w4dApqkIDEt8mHgJo5gBKyEpsOMEPMkZQ4 uOIGywRG4QWMDKsYRVMLkguKk9KLjPSKE3OLS/PS9ZLzczcxAkP+9L9nfTsYbx6wPsSYDDRu IrOUaHI+MGbySuINjc2MLExNTI2NzC3NSBNWEudd9DApSEggPbEkNTs1tSC1KL6oNCe1+BAj EwenVAOj00+WpZ/7kk1P/nAvenFt6hPdyG+y042TNnUd36auHKPCUNG10/R565fAVs/TifES 5415J4SaMjDXL1b0VWicH7J4ycL1PJf1ZxRO21cyu6Y7/b+b1mYhleVHFVmflprwhidm7Wtx 2T3rsdTTOgu5QyvrD4UcKE/mV51x5tdPnS8zXIVk2KOUWIozEg21mIuKEwECNpyrjwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrJIsWRmVeSWpSXmKPExsVy+t9jAV1Rq7wgg60LOS3mHznHanHl63s2 i0n3J7BYLL1+kcli2uyNjBZ3N5xltGjacZDNYsbkl2wOHB5r5q1h9JjdcJHF4373cSaPvi2r GD0+b5ILYI1qYLTJSE1MSS1SSM1Lzk/JzEu3VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy8QnQ dcvMATpGSaEsMacUKBSQWFyspG+HaUJoiJuuBUxjhK5vSBBcj5EBGkhYw5ix+8M51oJpehVd 2zIaGH+pdDFyckgImEi8WL6IHcIWk7hwbz1bFyMXh5DAIkaJZ/ObmCCc2UwST3/tZgOpYhNQ l7g4eTUziC0iEC4xdc9fZpAiZoEmRonOd12sIAlhAW+JUzsWMYHYLAKqElM7FzGC2LwCLhJt s96xQKxTlOh+NgFsKKeAq0TP/5NgthBQzczN09kmMPIuYGRYxSiaWpBcUJyUnmuoV5yYW1ya l66XnJ+7iREcUc+kdjCubLA4xCjAwajEw7thbW6QEGtiWXFl7iFGCQ5mJRHe4/p5QUK8KYmV ValF+fFFpTmpxYcYk4GumsgsJZqcD4z2vJJ4Q2MTc1NjU0sTCxMzS9KElcR5D7RaBwoJpCeW pGanphakFsFsYeLglGpgzDN7sDtvr+yl5Te3LI/Ped0ilLApYv3l9gUaLxLTy5qlP/7JVY/2 m13y6MruuqXcN2KvO1ZO0Lllt/1Af236tsuJ0bJF0p//u5x7t3l37SatWVsqOybJrN3jbeUc wXKV01sl8kHslWkWy2y7Nr06zRQnXlb4686aP7sc13Xnv9SLncVic6WdT4mlOCPRUIu5qDgR AFFBjansAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Mailman-Approved-At: Tue, 29 Oct 2013 03:25:41 -0700 Cc: mark.rutland@arm.com, sw0312.kim@samsung.com, shirish@chromium.org, Shirish S X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds dt support to hdmiphy config settings as it is board specific and depends on the signal pattern of board. Signed-off-by: Shirish S --- .../devicetree/bindings/video/exynos_hdmi.txt | 32 +++++++++ drivers/gpu/drm/exynos/exynos_hdmi.c | 76 ++++++++++++++++++-- 2 files changed, 104 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt index 323983b..c3b546a 100644 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt @@ -13,6 +13,30 @@ Required properties: b) pin number within the gpio controller. c) optional flags and pull up/down. +- hdmiphy-configs: following information about the hdmiphy config settings. + a) "nr-configs" specifies the number of pixel clocks supported. + b) "config: config" specifies the phy configuration settings, + wher 'N' denotes the number of iteration. + "pixel-clock" specifies the pixel clock + "conifig-de-emphasis-level" specifies the 8 bit configuration + of Data De-emphasis levels,below shown is example for + data de-emphasis register at address 0x145D0040. + 0x145D0040 [3:0] permitted values: + 0000 means 760 mVdiff && 1111 means 1400 mVdiff + 0x145D0040 [7:4] permitted values: + 0000 0dB + 0001 -0.25dB + 0010 -0.7dB + 0011 -1.15dB + 1111 -7.45dB + "config-clock-level" specifies the 8 bit configuration for + the corresponding clock level, for example if 0x145D005C + is the address of clock level register. + 0x145D005C [1:0] permitted values: + 00 means 0 mVdiff && 11 means 60 mVdiff + 0x145D005C [7:3] permitted values: + 00000 is 790 mVdiff + 11111 is 1430 mVdiff Example: hdmi { @@ -20,4 +44,12 @@ Example: reg = <0x14530000 0x100000>; interrupts = <0 95 0>; hpd-gpio = <&gpx3 7 1>; + hdmiphy-configs { + nr-configs = <1>; + config0: config0 { + pixel-clock = <25200000>; + config-de-emphasis-level = /bits/ 8 <0x26>; + config-clock-level = /bits/ 8 < 0x66>; + }; + } }; diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index a0e10ae..7b94a5d 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -200,6 +200,9 @@ struct hdmi_context { struct hdmi_resources res; + struct hdmiphy_config *confs; + int nr_confs; + int hpd_gpio; enum hdmi_type type; @@ -259,7 +262,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = { }, }; -static const struct hdmiphy_config hdmiphy_v14_configs[] = { +static struct hdmiphy_config hdmiphy_v14_configs[] = { { .pixel_clock = 25200000, .conf = { @@ -778,8 +781,8 @@ static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock) confs = hdmiphy_v13_configs; count = ARRAY_SIZE(hdmiphy_v13_configs); } else if (hdata->type == HDMI_TYPE14) { - confs = hdmiphy_v14_configs; - count = ARRAY_SIZE(hdmiphy_v14_configs); + confs = hdata->confs; + count = hdata->nr_confs; } else return -EINVAL; @@ -1366,7 +1369,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata) if (hdata->type == HDMI_TYPE13) hdmiphy_data = hdmiphy_v13_configs[i].conf; else - hdmiphy_data = hdmiphy_v14_configs[i].conf; + hdmiphy_data = hdata->confs[i].conf; memcpy(buffer, hdmiphy_data, 32); ret = i2c_master_send(hdata->hdmiphy_port, buffer, 32); @@ -1858,6 +1861,62 @@ void hdmi_attach_hdmiphy_client(struct i2c_client *hdmiphy) hdmi_hdmiphy = hdmiphy; } +static int drm_hdmi_dt_parse_phy_conf(struct platform_device *pdev, + struct hdmi_context *hdata) +{ + struct device *dev = &pdev->dev; + struct device_node *dev_np = dev->of_node; + struct device_node *phy_conf, *cfg_np; + int i = 0; + + /* Initialize with default config */ + hdata->confs = hdmiphy_v14_configs; + + phy_conf = of_find_node_by_name(dev_np, "hdmiphy-configs"); + if (phy_conf == NULL) { + DRM_ERROR("Did not find hdmiphy-configs node\n"); + return -ENODEV; + } + + if (of_property_read_u32(phy_conf, "nr-configs", &hdata->nr_confs)) { + DRM_ERROR("Failed to get the number of configurations"); + return -EINVAL; + } + + if (hdata->nr_confs < ARRAY_SIZE(hdmiphy_v14_configs)) { + DRM_ERROR("mismatch in the number of configs\n"); + return -EINVAL; + } + + for_each_child_of_node(phy_conf, cfg_np) { + if (!of_find_property(cfg_np, "pixel-clock", NULL)) + continue; + + if (of_property_read_u32_array(cfg_np, "pixel-clock", + &hdata->confs[i].pixel_clock, 1)) { + DRM_ERROR("Failed to get pixel clock\n"); + return -EINVAL; + } + + /* Overwrite the data de-emphasis and data level */ + if (of_property_read_u8_array(cfg_np, + "config-de-emphasis-level", + &hdata->confs[i].conf[16], 1)) { + DRM_ERROR("Failed to get conf\n"); + return -EINVAL; + } + /* Overwrite the clock level diff */ + if (of_property_read_u8_array(cfg_np, "config-clock-level", + &hdata->confs[i].conf[23], 1)) { + DRM_ERROR("Failed to get conf\n"); + return -EINVAL; + } + i++; + } + return 0; + +} + static struct s5p_hdmi_platform_data *drm_hdmi_dt_parse_pdata (struct device *dev) { @@ -1986,6 +2045,15 @@ static int hdmi_probe(struct platform_device *pdev) goto err_hdmiphy; } + /* get hdmiphy confs */ + if (hdata->type == HDMI_TYPE14) { + ret = drm_hdmi_dt_parse_phy_conf(pdev, hdata); + if (ret) { + DRM_ERROR("failed to get user defined config,will use + default configs, eye diagram tests may fail\n"); + } + } + /* Attach HDMI Driver to common hdmi. */ exynos_hdmi_drv_attach(drm_hdmi_ctx);