| Message ID | 1392204688-4591-15-git-send-email-a.hajda@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 12/02/14 13:31, Andrzej Hajda wrote: > The patch adds s6e8aa0 panel node for trats2. > It adds also trats2 specific properties for DSI > and regulator required by panel. > > Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> > --- > arch/arm/boot/dts/exynos4412-trats2.dts | 47 +++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts > index fb7b9ae..0986d08 100644 > --- a/arch/arm/boot/dts/exynos4412-trats2.dts > +++ b/arch/arm/boot/dts/exynos4412-trats2.dts > @@ -442,6 +442,15 @@ > }; > }; > > + lcd_vdd3_reg: voltage-regulator@1 { > + compatible = "regulator-fixed"; > + regulator-name = "LCD_VDD_2.2V"; > + regulator-min-microvolt = <2200000>; > + regulator-max-microvolt = <2200000>; > + gpio = <&gpc0 1 0>; > + enable-active-high; > + }; > + > sdhci@12510000 { > bus-width = <8>; > non-removable; > @@ -498,6 +507,44 @@ > }; > }; > > + dsi_0: dsi@11C80000 { > + vddcore-supply = <&ldo8_reg>; > + vddio-supply = <&ldo10_reg>; > + samsung,pll-clock-frequency = <24000000>; > + samsung,burst-clock-frequency = <500000000>; > + samsung,esc-clock-frequency = <20000000>; > + status = "okay"; > + > + panel@0 { > + compatible = "samsung,s6e8aa0"; > + reg = <0>; > + vdd3-supply = <&lcd_vdd3_reg>; > + vci-supply = <&ldo25_reg>; > + reset-gpio = <&gpy4 5 0>; > + power-on-delay= <50>; > + reset-delay = <100>; > + init-delay = <100>; > + flip-horizontal; > + flip-vertical; > + panel-width-mm = <58>; > + panel-height-mm = <103>; I have the same comment here as for the bridge chip: I would specify the video ports/endpoints between DSI master and the panel, even if you don't use them at the moment. Tomi
On 02/28/2014 02:33 PM, Tomi Valkeinen wrote: > I have the same comment here as for the bridge chip: I would specify the > video ports/endpoints between DSI master and the panel, even if you > don't use them at the moment. > > Tomi > > I have sent my answer in bridge chip subthread. Regards Andrzej
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index fb7b9ae..0986d08 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -442,6 +442,15 @@ }; }; + lcd_vdd3_reg: voltage-regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "LCD_VDD_2.2V"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + gpio = <&gpc0 1 0>; + enable-active-high; + }; + sdhci@12510000 { bus-width = <8>; non-removable; @@ -498,6 +507,44 @@ }; }; + dsi_0: dsi@11C80000 { + vddcore-supply = <&ldo8_reg>; + vddio-supply = <&ldo10_reg>; + samsung,pll-clock-frequency = <24000000>; + samsung,burst-clock-frequency = <500000000>; + samsung,esc-clock-frequency = <20000000>; + status = "okay"; + + panel@0 { + compatible = "samsung,s6e8aa0"; + reg = <0>; + vdd3-supply = <&lcd_vdd3_reg>; + vci-supply = <&ldo25_reg>; + reset-gpio = <&gpy4 5 0>; + power-on-delay= <50>; + reset-delay = <100>; + init-delay = <100>; + flip-horizontal; + flip-vertical; + panel-width-mm = <58>; + panel-height-mm = <103>; + + display-timings { + timing-0 { + clock-frequency = <0>; + hactive = <720>; + vactive = <1280>; + hfront-porch = <5>; + hback-porch = <5>; + hsync-len = <5>; + vfront-porch = <13>; + vback-porch = <1>; + vsync-len = <2>; + }; + }; + }; + }; + camera { pinctrl-0 = <&cam_port_b_clk_active>; pinctrl-names = "default";
The patch adds s6e8aa0 panel node for trats2. It adds also trats2 specific properties for DSI and regulator required by panel. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> --- arch/arm/boot/dts/exynos4412-trats2.dts | 47 +++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+)