From patchwork Thu Feb 20 21:27:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Seiderer X-Patchwork-Id: 3689981 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EF20E9F39F for ; Thu, 20 Feb 2014 21:27:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0837720117 for ; Thu, 20 Feb 2014 21:27:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AC26F20145 for ; Thu, 20 Feb 2014 21:27:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CF5D0FA661; Thu, 20 Feb 2014 13:27:24 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mout.gmx.net (mout.gmx.net [212.227.15.18]) by gabe.freedesktop.org (Postfix) with ESMTP id 8CF82FA661 for ; Thu, 20 Feb 2014 13:27:22 -0800 (PST) Received: from linux.local ([94.216.53.195]) by mail.gmx.com (mrgmx003) with ESMTPSA (Nemesis) id 0Lugbo-1XGEHI0Xp2-00zr9Z for ; Thu, 20 Feb 2014 22:27:21 +0100 From: Peter Seiderer To: dri-devel@lists.freedesktop.org Subject: [RFC] imx-drm: enable full hd dual lvds display (side-by-side) Date: Thu, 20 Feb 2014 22:27:18 +0100 Message-Id: <1392931638-9712-1-git-send-email-ps.report@gmx.net> X-Mailer: git-send-email 1.8.1.4 X-Provags-ID: V03:K0:oScd1DvaZdZkl8kGZpX8Jmoy8FJwmm6m84GJT+dRoss4BE14kmi F72URukPfQeIRBrks95T6pUV1eYeJc6QZWwD320B6GjNZ8UCJ0vV/8x2tdNA5BhSFPeEoPU 61wzh0Wtro4I48CQf6csIZSS3JhWmk/V2ALWaiwywqvmihhVA9KF8Ayp1qz3Tf4L6C7oRVR 5RIu/1pY1Tp4fbzNZRXiw== Cc: Greg Kroah-Hartman , Sascha Hauer X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable support for a full hd (1920x1080) lcd display ([1]/[2]), driven by two lvds channels (channel 0 pixels on the left side, channel 1 pixels on the right side). First configure two lvds channels with half display width: lvds-channel@0 { fsl,data-mapping = "spwg"; fsl,data-width = <24>; status = "okay"; display-timings { native-mode = <&timing0>; timing0: nlt-nl192108ac10-01d { clock-frequency = <74590000>; hactive = <960>; vactive = <1080>; }; }; }; lvds-channel@1 { fsl,data-mapping = "spwg"; fsl,data-width = <24>; status = "okay"; display-timings { native-mode = <&timing1>; timing1: nlt-nl192108ac10-01d { clock-frequency = <74590000>; hactive = <960>; vactive = <1080>; }; }; }; Second force the frame buffer to the doubled default size as calculated from the lvds-channel entries, see changes in drivers/gpu/drm/drm_fb_helper.c. Third let the lvds-channel@1 memory start with half pitch offset, see changes in drivers/staging/imx-drm/ipuv3-plane.c. And last synchronize the two lvds channels (without the second half of the display has an vertical offset by some pixels), see changes in drivers/staging/imx-drm/ipu-v3/ipu-common.c Tested with TQMa6Q module/starter kit STKa6x ([3]/[4]). This is similar to the already existing imx-drm/ldb.txt option 'fsl,dual-channel' which is for displays with dual lvds where the odd pixels are on channel 0 and the even pixels are on channel 1. This (first implementation) is for requesting comments. Any hints/suggestion on howto implement this feature the right way (configurable, etc.)? [1] http://www1.futureelectronics.com/doc/NEC%20DISPLAYS/NL192108AC10-01D.pdf [2] http://www.nlt-technologies.co.jp/en/products/nl192108ac10-01d.html [3] http://www.tq-group.com/en/products/product-details/prod/embedded-modul-tqma6x/extb/Main/productdetail [4] http://www.tq-group.com/en/products/product-details/prod/starterkit-stka6x/extb/Main/productdetail Signed-off-by: Peter Seiderer --- drivers/gpu/drm/drm_fb_helper.c | 10 ++++++---- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 6 ++++++ drivers/staging/imx-drm/ipuv3-plane.c | 7 +++++++ 3 files changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index d99df15..50d980d 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -939,12 +939,14 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, if (desired_mode) { if (gamma_size == 0) gamma_size = fb_helper->crtc_info[i].mode_set.crtc->gamma_size; - if (desired_mode->hdisplay < sizes.fb_width) - sizes.fb_width = desired_mode->hdisplay; + /* double the frame buffer horizontal size */ + if (2 * desired_mode->hdisplay < sizes.fb_width) + sizes.fb_width = 2 * desired_mode->hdisplay; if (desired_mode->vdisplay < sizes.fb_height) sizes.fb_height = desired_mode->vdisplay; - if (desired_mode->hdisplay > sizes.surface_width) - sizes.surface_width = desired_mode->hdisplay; + /* double the frame buffer horizontal size */ + if (2 * desired_mode->hdisplay > sizes.surface_width) + sizes.surface_width = 2 * desired_mode->hdisplay; if (desired_mode->vdisplay > sizes.surface_height) sizes.surface_height = desired_mode->vdisplay; crtc_count++; diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c index ca85d3d..05eb053 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c @@ -613,6 +613,7 @@ int ipu_module_enable(struct ipu_soc *ipu, u32 mask) { unsigned long lock_flags; u32 val; + u32 dval; spin_lock_irqsave(&ipu->lock, lock_flags); @@ -627,6 +628,11 @@ int ipu_module_enable(struct ipu_soc *ipu, u32 mask) val = ipu_cm_read(ipu, IPU_CONF); val |= mask; + + /* first disable DI0/DI1 to achieve a synchronous start of both lvds channels */ + dval = val & (~(IPU_CONF_DI0_EN | IPU_CONF_DI1_EN)); + ipu_cm_write(ipu, dval, IPU_CONF); + ipu_cm_write(ipu, val, IPU_CONF); spin_unlock_irqrestore(&ipu->lock, lock_flags); diff --git a/drivers/staging/imx-drm/ipuv3-plane.c b/drivers/staging/imx-drm/ipuv3-plane.c index 34b642a..8a44d5e 100644 --- a/drivers/staging/imx-drm/ipuv3-plane.c +++ b/drivers/staging/imx-drm/ipuv3-plane.c @@ -19,6 +19,7 @@ #include "ipu-v3/imx-ipu-v3.h" #include "ipuv3-plane.h" +#include "ipu-v3/ipu-prv.h" #define to_ipu_plane(x) container_of(x, struct ipu_plane, base) @@ -80,6 +81,12 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb, eba = cma_obj->paddr + fb->offsets[0] + fb->pitches[0] * y + (fb->bits_per_pixel >> 3) * x; + + /* start the second lvds output channel with half pitch offset */ + if (ipu_plane->ipu_ch->num == 28) { + eba += fb->pitches[0] / 2; + } + ipu_cpmem_set_buffer(cpmem, 0, eba); ipu_cpmem_set_buffer(cpmem, 1, eba);