diff mbox

drm/exynos: add phy settings for RB resolutions

Message ID 1394461049-27547-1-git-send-email-s.shirish@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Shirish S March 10, 2014, 2:17 p.m. UTC
below is list of pixel clocks and resoluitons
this patch adds:

71000000  - 1280x800@60Hz RB
73250000  - 800x600@120Hz RB
88750000  - 1440x900@60Hz RB
115500000 - 1024x768@120Hz RB
119000000 - 1680x1050@60Hz RB

without these pixel clocks' support the mentioned
resolutions fail to be detected in exynos5250.

Signed-off-by: Shirish S <s.shirish@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c |   45 ++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

Comments

Tomasz Figa March 12, 2014, 3:26 p.m. UTC | #1
Hi Shirish,

On 10.03.2014 15:17, Shirish S wrote:
> below is list of pixel clocks and resoluitons
> this patch adds:
>
> 71000000  - 1280x800@60Hz RB
> 73250000  - 800x600@120Hz RB
> 88750000  - 1440x900@60Hz RB
> 115500000 - 1024x768@120Hz RB
> 119000000 - 1680x1050@60Hz RB
>
> without these pixel clocks' support the mentioned
> resolutions fail to be detected in exynos5250.

This commit message is poorly written. Please start sentences with 
capital letters and check spelling before sending.

Here follows an example of commit message for this patch:

8<---

This patch adds several new pixel clock settings for HDMI PHY v14 
(Exynos5250). Without them following display modes cannot be supported:

  71000000 Hz - 1280x800@60Hz RB
  73250000 Hz - 800x600@120Hz RB
  88750000 Hz - 1440x900@60Hz RB
115500000 Hz - 1024x768@120Hz RB
119000000 Hz - 1680x1050@60Hz RB

--->8

>
> Signed-off-by: Shirish S <s.shirish@samsung.com>
> ---
>   drivers/gpu/drm/exynos/exynos_hdmi.c |   45 ++++++++++++++++++++++++++++++++++
>   1 file changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
> index c021ddc..650ce48 100644
> --- a/drivers/gpu/drm/exynos/exynos_hdmi.c
> +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
> @@ -303,6 +303,24 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = {
>   		},
>   	},
>   	{
> +		.pixel_clock = 71000000,
> +		.conf = {
> +			0x01, 0x91, 0x1E, 0x15, 0x40, 0x3C, 0xCE, 0x08,

Lowercase is preferred by kernel coding style for hexadecimal values.

Best regards,
Tomasz
Shirish S March 13, 2014, 2:49 a.m. UTC | #2
Hi Tomasz,
Thanks for the review comments,



On Wed, Mar 12, 2014 at 8:26 AM, Tomasz Figa <t.figa@samsung.com> wrote:
>
> Hi Shirish,
>
>
> On 10.03.2014 15:17, Shirish S wrote:
>>
>> below is list of pixel clocks and resoluitons
>> this patch adds:
>>
>> 71000000  - 1280x800@60Hz RB
>> 73250000  - 800x600@120Hz RB
>> 88750000  - 1440x900@60Hz RB
>> 115500000 - 1024x768@120Hz RB
>> 119000000 - 1680x1050@60Hz RB
>>
>> without these pixel clocks' support the mentioned
>> resolutions fail to be detected in exynos5250.
>
>
> This commit message is poorly written. Please start sentences with capital letters and check spelling before sending.
>
> Here follows an example of commit message for this patch:
>
> 8<---
>
> This patch adds several new pixel clock settings for HDMI PHY v14 (Exynos5250). Without them following display modes cannot be supported:
>
>  71000000 Hz - 1280x800@60Hz RB
>  73250000 Hz - 800x600@120Hz RB
>  88750000 Hz - 1440x900@60Hz RB
> 115500000 Hz - 1024x768@120Hz RB
> 119000000 Hz - 1680x1050@60Hz RB
>
> --->8
>
>
agreed, have updated it in the next patchset
>>
>> Signed-off-by: Shirish S <s.shirish@samsung.com>
>> ---
>>   drivers/gpu/drm/exynos/exynos_hdmi.c |   45 ++++++++++++++++++++++++++++++++++
>>   1 file changed, 45 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
>> index c021ddc..650ce48 100644
>> --- a/drivers/gpu/drm/exynos/exynos_hdmi.c
>> +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
>> @@ -303,6 +303,24 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = {
>>                 },
>>         },
>>         {
>> +               .pixel_clock = 71000000,
>> +               .conf = {
>> +                       0x01, 0x91, 0x1E, 0x15, 0x40, 0x3C, 0xCE, 0x08,
>
>
> Lowercase is preferred by kernel coding style for hexadecimal values.
Done.
>
> Best regards,
> Tomasz
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

Thanks & Regards,
Shirish S
diff mbox

Patch

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index c021ddc..650ce48 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -303,6 +303,24 @@  static const struct hdmiphy_config hdmiphy_v14_configs[] = {
 		},
 	},
 	{
+		.pixel_clock = 71000000,
+		.conf = {
+			0x01, 0x91, 0x1E, 0x15, 0x40, 0x3C, 0xCE, 0x08,
+			0x04, 0x20, 0xB2, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
+			0x54, 0xAD, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 73250000,
+		.conf = {
+			0x01, 0xD1, 0x1F, 0x15, 0x40, 0x18, 0xE9, 0x08,
+			0x02, 0xA0, 0xB7, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
+			0x54, 0xA8, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
 		.pixel_clock = 74176000,
 		.conf = {
 			0x01, 0xd1, 0x3e, 0x35, 0x40, 0x5b, 0xde, 0x08,
@@ -330,6 +348,15 @@  static const struct hdmiphy_config hdmiphy_v14_configs[] = {
 		},
 	},
 	{
+		.pixel_clock = 88750000,
+		.conf = {
+			0x01, 0x91, 0x25, 0x17, 0x40, 0x30, 0xFE, 0x08,
+			0x06, 0x20, 0xDE, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
+			0x54, 0x8A, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
 		.pixel_clock = 106500000,
 		.conf = {
 			0x01, 0xd1, 0x2c, 0x12, 0x40, 0x0c, 0x09, 0x08,
@@ -348,6 +375,24 @@  static const struct hdmiphy_config hdmiphy_v14_configs[] = {
 		},
 	},
 	{
+		.pixel_clock = 115500000,
+		.conf = {
+			0x01, 0xD1, 0x30, 0x1A, 0x40, 0x40, 0x10, 0x04,
+			0x04, 0xA0, 0x21, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
+			0x54, 0xAA, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 119000000,
+		.conf = {
+			0x01, 0x91, 0x32, 0x14, 0x40, 0x60, 0xD8, 0x08,
+			0x06, 0x20, 0x2A, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
+			0x54, 0x9D, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
 		.pixel_clock = 146250000,
 		.conf = {
 			0x01, 0xd1, 0x3d, 0x15, 0x40, 0x18, 0xfd, 0x08,