From patchwork Mon Apr 7 12:44:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Carikli X-Patchwork-Id: 3945601 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 41C7BBFF02 for ; Mon, 7 Apr 2014 13:18:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD78320254 for ; Mon, 7 Apr 2014 13:18:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D461B20256 for ; Mon, 7 Apr 2014 13:18:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ED9326E63E; Mon, 7 Apr 2014 06:18:44 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp3-g21.free.fr (smtp3-g21.free.fr [212.27.42.3]) by gabe.freedesktop.org (Postfix) with ESMTP id 53F5E6E618 for ; Mon, 7 Apr 2014 05:45:49 -0700 (PDT) Received: from denis-N73SV.local.eukrea.fr (unknown [88.170.243.169]) by smtp3-g21.free.fr (Postfix) with ESMTP id A207AA627D; Mon, 7 Apr 2014 14:45:42 +0200 (CEST) From: Denis Carikli To: Philipp Zabel Subject: [PATCH v12][ 08/12] imx-drm: Use drm_display_mode timings flags. Date: Mon, 7 Apr 2014 14:44:47 +0200 Message-Id: <1396874691-27954-8-git-send-email-denis@eukrea.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396874691-27954-1-git-send-email-denis@eukrea.com> References: <1396874691-27954-1-git-send-email-denis@eukrea.com> X-Mailman-Approved-At: Mon, 07 Apr 2014 06:18:38 -0700 Cc: devel@driverdev.osuosl.org, Russell King , =?UTF-8?q?Eric=20B=C3=A9nard?= , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, Denis Carikli , Laurent Pinchart , Sascha Hauer , linux-arm-kernel@lists.infradead.org, Mauro Carvalho Chehab X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The previous hardware behaviour was kept if the flags are not set. Signed-off-by: Denis Carikli --- ChangeLog v11->v12: - Rebased: It now uses the following new flags defines names: CLK_POL, ENABLE_POL - The inversions in ipuv3-crtc.c are now fixed. - ipuv3-crtc.c was still using mode->private_flags from the previous versions of this patchset, that's now fixed. ChangeLog v10->v11: - This patch was splitted-out and adapted from: "Prepare imx-drm for extra display-timings retrival." - The display-timings dt specific part was removed. - The flags names were changed to use the DRM ones from: "drm: drm_display_mode: add signal polarity flags" --- drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h | 6 ++++-- drivers/staging/imx-drm/ipu-v3/ipu-di.c | 7 ++++++- drivers/staging/imx-drm/ipuv3-crtc.c | 20 ++++++++++++++++++-- 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h index eba8893..c934394 100644 --- a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h +++ b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h @@ -29,9 +29,11 @@ enum ipuv3_type { #define CLK_POL_NEGEDGE 0 #define CLK_POL_POSEDGE 1 +#define CLK_POL_PRESERVE 2 #define ENABLE_POL_LOW 0 #define ENABLE_POL_HIGH 1 +#define ENABLE_POL_PRESERVE 2 /* * Bitfield of Display Interface signal polarities. @@ -43,10 +45,10 @@ struct ipu_di_signal_cfg { unsigned clksel_en:1; unsigned clkidle_en:1; unsigned data_pol:1; /* true = inverted */ - unsigned clk_pol:1; - unsigned enable_pol:1; unsigned Hsync_pol:1; /* true = active high */ unsigned Vsync_pol:1; + u8 clk_pol; + u8 enable_pol; u16 width; u16 height; diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-di.c b/drivers/staging/imx-drm/ipu-v3/ipu-di.c index 0ce3f52..c00b0ba 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-di.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-di.c @@ -597,6 +597,8 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) if (sig->clk_pol == CLK_POL_POSEDGE) di_gen |= DI_GEN_POLARITY_DISP_CLK; + else if (sig->clk_pol == CLK_POL_NEGEDGE) + di_gen &= ~DI_GEN_POLARITY_DISP_CLK; ipu_di_write(di, di_gen, DI_GENERAL); @@ -604,10 +606,13 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) DI_SYNC_AS_GEN); reg = ipu_di_read(di, DI_POL); - reg &= ~(DI_POL_DRDY_DATA_POLARITY | DI_POL_DRDY_POLARITY_15); + reg &= ~(DI_POL_DRDY_DATA_POLARITY); if (sig->enable_pol == ENABLE_POL_HIGH) reg |= DI_POL_DRDY_POLARITY_15; + else if (sig->enable_pol == ENABLE_POL_LOW) + reg &= ~DI_POL_DRDY_POLARITY_15; + if (sig->data_pol) reg |= DI_POL_DRDY_DATA_POLARITY; diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c index 9ba089c..b59b745 100644 --- a/drivers/staging/imx-drm/ipuv3-crtc.c +++ b/drivers/staging/imx-drm/ipuv3-crtc.c @@ -157,8 +157,24 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc, if (mode->flags & DRM_MODE_FLAG_PVSYNC) sig_cfg.Vsync_pol = 1; - sig_cfg.enable_pol = ENABLE_POL_HIGH; - sig_cfg.clk_pol = CLK_POL_NEGEDGE; + if (mode->pol_flags & DRM_MODE_FLAG_POL_PIXDATA_POSEDGE) + sig_cfg.clk_pol = CLK_POL_POSEDGE; + else if (mode->pol_flags & DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE) + sig_cfg.clk_pol = CLK_POL_NEGEDGE; + else if (mode->pol_flags & DRM_MODE_FLAG_POL_PIXDATA_PRESERVE) + sig_cfg.clk_pol = CLK_POL_PRESERVE; + else + sig_cfg.clk_pol = CLK_POL_NEGEDGE; + + if (mode->pol_flags & DRM_MODE_FLAG_POL_DE_HIGH) + sig_cfg.enable_pol = ENABLE_POL_HIGH; + else if (mode->pol_flags & DRM_MODE_FLAG_POL_DE_LOW) + sig_cfg.enable_pol = ENABLE_POL_LOW; + else if (mode->pol_flags & DRM_MODE_FLAG_POL_DE_PRESERVE) + sig_cfg.enable_pol = ENABLE_POL_PRESERVE; + else + sig_cfg.enable_pol = ENABLE_POL_HIGH; + sig_cfg.width = mode->hdisplay; sig_cfg.height = mode->vdisplay; sig_cfg.pixel_fmt = out_pixel_fmt;