From patchwork Fri Apr 11 07:23:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: archit taneja X-Patchwork-Id: 3966401 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 83D40BFF02 for ; Fri, 11 Apr 2014 07:24:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AB06A2080D for ; Fri, 11 Apr 2014 07:24:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C65FF2080B for ; Fri, 11 Apr 2014 07:24:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D1066ECFE; Fri, 11 Apr 2014 00:24:42 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by gabe.freedesktop.org (Postfix) with ESMTP id A4FC76ED00 for ; Fri, 11 Apr 2014 00:24:40 -0700 (PDT) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3B7Od1b010292; Fri, 11 Apr 2014 02:24:39 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3B7OdhP028245; Fri, 11 Apr 2014 02:24:39 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Fri, 11 Apr 2014 02:24:38 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3B7Od7K019804; Fri, 11 Apr 2014 02:24:39 -0500 Received: from localhost (a0393947pc.apr.dhcp.ti.com [172.24.145.166]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s3B7Obt09820; Fri, 11 Apr 2014 02:24:37 -0500 (CDT) From: Archit Taneja To: , Subject: [PATCH 4/6] drm/omap: Allow allocation of larger buffers Date: Fri, 11 Apr 2014 12:53:33 +0530 Message-ID: <1397201015-2807-5-git-send-email-archit@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1397201015-2807-1-git-send-email-archit@ti.com> References: <1397201015-2807-1-git-send-email-archit@ti.com> MIME-Version: 1.0 Cc: dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The drm ioctl DRM_IOCTL_MODE_ADDFB2 doesn't let us allocate buffers which are greater than what is specified in the driver through dev->mode_config. Create helpers for DISPC which return the max manager width and height supported by the device. The maximum width for a framebuffer is set to the combined width of the all the crtcs, assuming they are arranged horizontally. Signed-off-by: Archit Taneja --- drivers/gpu/drm/omapdrm/omap_drv.c | 10 ++++++---- drivers/video/omap2/dss/dispc.c | 12 ++++++++++++ include/video/omapdss.h | 2 ++ 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index c8270e4..55ec575 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -306,11 +306,13 @@ static int omap_modeset_init(struct drm_device *dev) dev->mode_config.min_width = 32; dev->mode_config.min_height = 32; - /* note: eventually will need some cpu_is_omapXYZ() type stuff here - * to fill in these limits properly on different OMAP generations.. + /* + * Note: the maximum width is set to the combined width of all the + * crtcs. We could assume the same for the maximum height too, but + * we generally don't use such a configuration. */ - dev->mode_config.max_width = 2048; - dev->mode_config.max_height = 2048; + dev->mode_config.max_width = num_crtcs * dispc_mgr_max_width(); + dev->mode_config.max_height = dispc_mgr_max_height(); dev->mode_config.funcs = &omap_mode_config_funcs; diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 77d6221..47f9829 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2999,6 +2999,18 @@ void dispc_mgr_set_timings(enum omap_channel channel, } EXPORT_SYMBOL(dispc_mgr_set_timings); +u16 dispc_mgr_max_width(void) +{ + return dispc.feat->mgr_width_max; +} +EXPORT_SYMBOL(dispc_mgr_max_width); + +u16 dispc_mgr_max_height(void) +{ + return dispc.feat->mgr_height_max; +} +EXPORT_SYMBOL(dispc_mgr_max_height); + static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div, u16 pck_div) { diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 3d7c51a..53637ac 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -949,6 +949,8 @@ void dispc_mgr_set_lcd_config(enum omap_channel channel, const struct dss_lcd_mgr_config *config); void dispc_mgr_set_timings(enum omap_channel channel, const struct omap_video_timings *timings); +u16 dispc_mgr_max_width(void); +u16 dispc_mgr_max_height(void); void dispc_mgr_setup(enum omap_channel channel, const struct omap_overlay_manager_info *info);