| Message ID | 1397513422-1566-1-git-send-email-christophjaeger@linux.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Am 15.04.2014 00:13, schrieb Deucher, Alexander: >> -----Original Message----- >> From: Christoph Jaeger [mailto:christophjaeger@linux.com] >> Sent: Monday, April 14, 2014 6:10 PM >> To: Deucher, Alexander; Koenig, Christian; airlied@linux.ie >> Cc: dri-devel@lists.freedesktop.org; linux-kernel@vger.kernel.org; Christoph >> Jaeger >> Subject: [PATCH] drm/radeon: fix VCE fence command >> >> Due to a type mismatch that causes an implicit type conversion, the >> upper 32 bits of the GPU address have been zeroed out when adding to the >> command buffer. >> >> Picked up by Coverity - CID 1198624. >> >> Signed-off-by: Christoph Jaeger <christophjaeger@linux.com> > Good catch! Indeed. > > Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Added to my 3.15 fixes queue. Thanks, Christian. > >> --- >> drivers/gpu/drm/radeon/radeon_vce.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/radeon/radeon_vce.c >> b/drivers/gpu/drm/radeon/radeon_vce.c >> index 76e9904..ced53dd 100644 >> --- a/drivers/gpu/drm/radeon/radeon_vce.c >> +++ b/drivers/gpu/drm/radeon/radeon_vce.c >> @@ -613,7 +613,7 @@ void radeon_vce_fence_emit(struct radeon_device >> *rdev, >> struct radeon_fence *fence) >> { >> struct radeon_ring *ring = &rdev->ring[fence->ring]; >> - uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr; >> + uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; >> >> radeon_ring_write(ring, VCE_CMD_FENCE); >> radeon_ring_write(ring, addr); >> -- >> 1.9.0
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c index 76e9904..ced53dd 100644 --- a/drivers/gpu/drm/radeon/radeon_vce.c +++ b/drivers/gpu/drm/radeon/radeon_vce.c @@ -613,7 +613,7 @@ void radeon_vce_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence) { struct radeon_ring *ring = &rdev->ring[fence->ring]; - uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr; + uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; radeon_ring_write(ring, VCE_CMD_FENCE); radeon_ring_write(ring, addr);
Due to a type mismatch that causes an implicit type conversion, the upper 32 bits of the GPU address have been zeroed out when adding to the command buffer. Picked up by Coverity - CID 1198624. Signed-off-by: Christoph Jaeger <christophjaeger@linux.com> --- drivers/gpu/drm/radeon/radeon_vce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)