From patchwork Tue Apr 29 14:29:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 4087761 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3103A9F169 for ; Tue, 29 Apr 2014 14:30:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B86E4201F7 for ; Tue, 29 Apr 2014 14:29:58 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1DFE7201FB for ; Tue, 29 Apr 2014 14:29:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 616B06EA43; Tue, 29 Apr 2014 07:29:54 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from pegasos-out.vodafone.de (pegasos-out.vodafone.de [80.84.1.38]) by gabe.freedesktop.org (Postfix) with ESMTP id 3650C6EA37 for ; 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a=rsa-sha256; c=relaxed/relaxed; d=vodafone.de; s=mail; t=1398781781; bh=zfvfkOhyCVIO4XyuR0QNTGljzGPgiLOz7wb6Wku97Qg=; h=From:To:Subject:Date:In-Reply-To:References; b=1+lzheMllGXPIg8Q7ETzfh4foyvwAooSnWxKCQPbssRXpjSV4HM1Fg/FYjwEZ56y8 uFR8prEPSEQQEqTRs0u4Apr0wF5c5UMjkkJB0Y4rAqI4qI47cMaDV7cWsqYPIg2nDb u+LYHkVVv4JP5JezXWBTQgva0AiTUDxD6l6dX+3w= X-DKIM: OpenDKIM Filter v2.0.2 smtp-03.vodafone.de B031BE4FA4 X-Virus-Scanned: amavisd-new at vodafone.de Received: from smtp-03.vodafone.de ([127.0.0.1]) by localhost (xsmail-dmz9.prod.vfnet.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Vm23ROFd-mj1 for ; Tue, 29 Apr 2014 16:29:34 +0200 (CEST) From: =?UTF-8?q?Christian=20K=C3=B6nig?= To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/5] drm/radeon: split page flip and pending callback Date: Tue, 29 Apr 2014 16:29:30 +0200 Message-Id: <1398781773-2319-2-git-send-email-deathsimple@vodafone.de> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1398781773-2319-1-git-send-email-deathsimple@vodafone.de> References: <1398781773-2319-1-git-send-email-deathsimple@vodafone.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christian König Signed-off-by: Christian König --- drivers/gpu/drm/radeon/evergreen.c | 18 ++++++++++++++++-- drivers/gpu/drm/radeon/r100.c | 21 ++++++++++++++++++--- drivers/gpu/drm/radeon/radeon.h | 4 +++- drivers/gpu/drm/radeon/radeon_asic.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/radeon/radeon_asic.h | 15 +++++++++++---- drivers/gpu/drm/radeon/radeon_display.c | 3 ++- drivers/gpu/drm/radeon/rs600.c | 10 ++++++++-- drivers/gpu/drm/radeon/rv770.c | 10 ++++++++-- 8 files changed, 88 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 249fbc2..34ff5ba 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1313,7 +1313,7 @@ void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc) * double buffered update to take place. * Returns the current update pending status. */ -u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) +void evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) { struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; u32 tmp = RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset); @@ -1345,9 +1345,23 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) /* Unlock the lock, so double-buffering can take place inside vblank */ tmp &= ~EVERGREEN_GRPH_UPDATE_LOCK; WREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); +} + +/** + * evergreen_page_flip_pending - check if page flip is still pending + * + * @rdev: radeon_device pointer + * @crtc_id: crtc to check + * + * Returns the current update pending status. + */ +bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc_id) +{ + struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; /* Return current update_pending status: */ - return RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING; + return !!(RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & + EVERGREEN_GRPH_SURFACE_UPDATE_PENDING); } /* get temperature in millidegrees */ diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 840651f..52548f7 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -152,9 +152,8 @@ void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) * During vblank we take the crtc lock and wait for the update_pending * bit to go high, when it does, we release the lock, and allow the * double buffered update to take place. - * Returns the current update pending status. */ -u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) +void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) { struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; @@ -176,8 +175,24 @@ u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) tmp &= ~RADEON_CRTC_OFFSET__OFFSET_LOCK; WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); +} + +/** + * r100_page_flip_pending - check if page flip is still pending + * + * @rdev: radeon_device pointer + * @crtc_id: crtc to check + * + * Check if the last pagefilp is still pending (r1xx-r4xx). + * Returns the current update pending status. + */ +bool r100_page_flip_pending(struct radeon_device *rdev, int crtc_id) +{ + struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; + /* Return current update_pending status: */ - return RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET; + return !!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & + RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET); } /** diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 5c4341a..fb7c499 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -1882,7 +1882,8 @@ struct radeon_asic { } dpm; /* pageflipping */ struct { - u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base); + void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base); + bool (*page_flip_pending)(struct radeon_device *rdev, int crtc); } pflip; }; @@ -2742,6 +2743,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev)) #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev)) #define radeon_page_flip(rdev, crtc, base) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base)) +#define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc)) #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev)) #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev)) diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index d096826..e6d5f57 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -249,6 +249,7 @@ static struct radeon_asic r100_asic = { }, .pflip = { .page_flip = &r100_page_flip, + .page_flip_pending = &r100_page_flip_pending, }, }; @@ -314,6 +315,7 @@ static struct radeon_asic r200_asic = { }, .pflip = { .page_flip = &r100_page_flip, + .page_flip_pending = &r100_page_flip_pending, }, }; @@ -393,6 +395,7 @@ static struct radeon_asic r300_asic = { }, .pflip = { .page_flip = &r100_page_flip, + .page_flip_pending = &r100_page_flip_pending, }, }; @@ -458,6 +461,7 @@ static struct radeon_asic r300_asic_pcie = { }, .pflip = { .page_flip = &r100_page_flip, + .page_flip_pending = &r100_page_flip_pending, }, }; @@ -523,6 +527,7 @@ static struct radeon_asic r420_asic = { }, .pflip = { .page_flip = &r100_page_flip, + .page_flip_pending = &r100_page_flip_pending, }, }; @@ -588,6 +593,7 @@ static struct radeon_asic rs400_asic = { }, .pflip = { .page_flip = &r100_page_flip, + .page_flip_pending = &r100_page_flip_pending, }, }; @@ -655,6 +661,7 @@ static struct radeon_asic rs600_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -722,6 +729,7 @@ static struct radeon_asic rs690_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -787,6 +795,7 @@ static struct radeon_asic rv515_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -852,6 +861,7 @@ static struct radeon_asic r520_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -949,6 +959,7 @@ static struct radeon_asic r600_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -1038,6 +1049,7 @@ static struct radeon_asic rv6xx_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -1127,6 +1139,7 @@ static struct radeon_asic rs780_asic = { }, .pflip = { .page_flip = &rs600_page_flip, + .page_flip_pending = &rs600_page_flip_pending, }, }; @@ -1231,6 +1244,7 @@ static struct radeon_asic rv770_asic = { }, .pflip = { .page_flip = &rv770_page_flip, + .page_flip_pending = &rv770_page_flip_pending, }, }; @@ -1348,6 +1362,7 @@ static struct radeon_asic evergreen_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -1438,6 +1453,7 @@ static struct radeon_asic sumo_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -1529,6 +1545,7 @@ static struct radeon_asic btc_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -1671,6 +1688,7 @@ static struct radeon_asic cayman_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -1770,6 +1788,7 @@ static struct radeon_asic trinity_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -1899,6 +1918,7 @@ static struct radeon_asic si_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -2060,6 +2080,7 @@ static struct radeon_asic ci_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; @@ -2163,6 +2184,7 @@ static struct radeon_asic kv_asic = { }, .pflip = { .page_flip = &evergreen_page_flip, + .page_flip_pending = &evergreen_page_flip_pending, }, }; diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index aa2b60a1..d2d6124 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h @@ -135,7 +135,9 @@ extern void r100_pm_prepare(struct radeon_device *rdev); extern void r100_pm_finish(struct radeon_device *rdev); extern void r100_pm_init_profile(struct radeon_device *rdev); extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); -extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); +extern void r100_page_flip(struct radeon_device *rdev, int crtc, + u64 crtc_base); +extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); extern int r100_mc_wait_for_idle(struct radeon_device *rdev); @@ -239,7 +241,9 @@ void rs600_hpd_set_polarity(struct radeon_device *rdev, extern void rs600_pm_misc(struct radeon_device *rdev); extern void rs600_pm_prepare(struct radeon_device *rdev); extern void rs600_pm_finish(struct radeon_device *rdev); -extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); +extern void rs600_page_flip(struct radeon_device *rdev, int crtc, + u64 crtc_base); +extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); void rs600_set_safe_registers(struct radeon_device *rdev); extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); @@ -443,7 +447,8 @@ void rv770_fini(struct radeon_device *rdev); int rv770_suspend(struct radeon_device *rdev); int rv770_resume(struct radeon_device *rdev); void rv770_pm_misc(struct radeon_device *rdev); -u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); +void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); +bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); void r700_cp_stop(struct radeon_device *rdev); void r700_cp_fini(struct radeon_device *rdev); @@ -509,7 +514,9 @@ extern void sumo_pm_init_profile(struct radeon_device *rdev); extern void btc_pm_init_profile(struct radeon_device *rdev); int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); -extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); +extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, + u64 crtc_base); +extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); void evergreen_disable_interrupt_state(struct radeon_device *rdev); int evergreen_mc_wait_for_idle(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 7df8d3b..acbdb1d 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -298,7 +298,8 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) /* New pageflip, or just completion of a previous one? */ if (!radeon_crtc->deferred_flip_completion) { /* do the flip (mmio) */ - update_pending = radeon_page_flip(rdev, crtc_id, work->new_crtc_base); + radeon_page_flip(rdev, crtc_id, work->new_crtc_base); + update_pending = radeon_page_flip_pending(rdev, crtc_id); } else { /* This is just a completion of a flip queued in crtc * at last invocation. Make sure we go directly to diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index e005bd7..9922ee5 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -109,7 +109,7 @@ void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) } } -u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) +void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) { struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); @@ -136,9 +136,15 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) /* Unlock the lock, so double-buffering can take place inside vblank */ tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); +} + +bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc_id) +{ + struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; /* Return current update_pending status: */ - return RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING; + return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & + AVIVO_D1GRPH_SURFACE_UPDATE_PENDING); } void avivo_program_fmt(struct drm_encoder *encoder) diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index fef3107..97b7766 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -801,7 +801,7 @@ u32 rv770_get_xclk(struct radeon_device *rdev) return reference_clock; } -u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) +void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) { struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); @@ -835,9 +835,15 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) /* Unlock the lock, so double-buffering can take place inside vblank */ tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); +} + +bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc_id) +{ + struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; /* Return current update_pending status: */ - return RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING; + return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & + AVIVO_D1GRPH_SURFACE_UPDATE_PENDING); } /* get temperature in millidegrees */