From patchwork Wed May 14 18:51:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 4177051 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 48ECFBFF02 for ; Wed, 14 May 2014 18:51:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6F82C2011E for ; Wed, 14 May 2014 18:51:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8106E200E0 for ; Wed, 14 May 2014 18:51:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8262C6ECD7; Wed, 14 May 2014 11:51:50 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ee0-f42.google.com (mail-ee0-f42.google.com [74.125.83.42]) by gabe.freedesktop.org (Postfix) with ESMTP id 9162A6ECE2 for ; Wed, 14 May 2014 11:51:48 -0700 (PDT) Received: by mail-ee0-f42.google.com with SMTP id d49so6795eek.1 for ; Wed, 14 May 2014 11:51:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CgfSGj387Yz8slQ9rUP+6wei+XzhDnsIUxNyhNz3Yvs=; b=eU/bNSGDYfO3PuxBXBTdZz+kVvqmBzAcdKQPotvsaIL7ybBK2HOIsN8kYKZqStffR1 ALyZ1LV4O9QF1Wuxc7yEST3J8ACaN83hZxb/6jfgIrCFFh0/vO5K9mQwvhCzcav6GWW3 6MqBTVMl739I7OxP9vBihMkeia3tABXWHFE3M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CgfSGj387Yz8slQ9rUP+6wei+XzhDnsIUxNyhNz3Yvs=; b=dWUKi38BZ0Y1yybR6YyCX/hk3ZpLRL3ppn3CLXVHP9eXyDrRYECgxmqo1TnCLQBGEq BlCZ69dE3heweWI/g+RvGkEYiFZHYZDCoWF4sDeD6Wj5YPZgOryGybV4fsvBnx2l6C/0 U+MfeUAS6OB4HQJO2bSPniHpXHJ7spfggeuQzafh5n7DE+LTNNqVCYu5Qdxwu64/cKLp Ur1DOo8Jayi9ZNRG8eOmtTAXSNDQMRASJyEMBSZAStwOg9/PZhzU4/J+Ai2swdRLGvc/ we2oZ/5lGCatwV2nYorStR5B5YUcM0C8KPCHg7qIx8Ym4ItIBf36+HXenGlH45ojHNft SvZA== X-Gm-Message-State: ALoCoQmkksltHL2PVHxCmCJoGd3Qffbd7G5bam5c1RYZn0oTlNWAVs7CpkLm0c/0JtqFJS0TKJJu X-Received: by 10.14.175.200 with SMTP id z48mr6302001eel.66.1400093507855; Wed, 14 May 2014 11:51:47 -0700 (PDT) Received: from bremse.ffwll.local (84-73-67-144.dclient.hispeed.ch. [84.73.67.144]) by mx.google.com with ESMTPSA id a4sm6973179eep.12.2014.05.14.11.51.46 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 May 2014 11:51:47 -0700 (PDT) From: Daniel Vetter To: DRI Development , Intel Graphics Development Subject: [PATCH 10/12] drm/i915: rip our vblank reset hacks for runtime PM Date: Wed, 14 May 2014 20:51:14 +0200 Message-Id: <1400093477-3217-13-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1400093477-3217-1-git-send-email-daniel.vetter@ffwll.ch> References: <1400093477-3217-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that we unconditionally dtrt when disabling/enabling crtcs we don't need any hacks any longer to keep the vblank logic sane when all the registers go poof. So let's rip it all out. This essentially undoes commit 9dbd8febb4dbc9199fcf340b882eb930e36b65b6 Author: Paulo Zanoni Date: Tue Jul 23 10:48:11 2013 -0300 drm/i915: update last_vblank when disabling the power well Apparently igt/kms_flip is already powerful enough to exercise this properly, yay! See the reference regression report for details. References: https://bugs.freedesktop.org/show_bug.cgi?id=66808 Testcase: igt/kms_flip/*-vs-rpm Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c | 34 ---------------------------------- 1 file changed, 34 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 75c1c766b507..45fa43f16bb3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5423,33 +5423,6 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv) } } -static void reset_vblank_counter(struct drm_device *dev, enum pipe pipe) -{ - assert_spin_locked(&dev->vbl_lock); - - dev->vblank[pipe].last = 0; -} - -static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv) -{ - struct drm_device *dev = dev_priv->dev; - enum pipe pipe; - unsigned long irqflags; - - /* - * After this, the registers on the pipes that are part of the power - * well will become zero, so we have to adjust our counters according to - * that. - * - * FIXME: Should we do this in general in drm_vblank_post_modeset? - */ - spin_lock_irqsave(&dev->vbl_lock, irqflags); - for_each_pipe(pipe) - if (pipe != PIPE_A) - reset_vblank_counter(dev, pipe); - spin_unlock_irqrestore(&dev->vbl_lock, irqflags); -} - static void hsw_set_power_well(struct drm_i915_private *dev_priv, struct i915_power_well *power_well, bool enable) { @@ -5478,8 +5451,6 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, I915_WRITE(HSW_PWR_WELL_DRIVER, 0); POSTING_READ(HSW_PWR_WELL_DRIVER); DRM_DEBUG_KMS("Requesting to disable the power well\n"); - - hsw_power_well_post_disable(dev_priv); } } } @@ -5646,11 +5617,6 @@ static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv, valleyview_disable_display_irqs(dev_priv); spin_unlock_irq(&dev_priv->irq_lock); - spin_lock_irq(&dev->vbl_lock); - for_each_pipe(pipe) - reset_vblank_counter(dev, pipe); - spin_unlock_irq(&dev->vbl_lock); - vlv_set_power_well(dev_priv, power_well, false); }