From patchwork Mon May 19 10:54:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 4201171 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A248B9F1CD for ; Mon, 19 May 2014 10:54:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CECFB20279 for ; Mon, 19 May 2014 10:54:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E82BA2020A for ; Mon, 19 May 2014 10:54:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 49A616E6F5; Mon, 19 May 2014 03:54:44 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout3.w1.samsung.com (mailout3.w1.samsung.com [210.118.77.13]) by gabe.freedesktop.org (Postfix) with ESMTP id 90B6C6E6F8 for ; Mon, 19 May 2014 03:54:42 -0700 (PDT) Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N5T001H8IB57N00@mailout3.w1.samsung.com> for dri-devel@lists.freedesktop.org; Mon, 19 May 2014 11:54:41 +0100 (BST) X-AuditID: cbfec7f5-b7f626d000004b39-94-5379e2ec5420 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id A1.B8.19257.CE2E9735; Mon, 19 May 2014 11:54:36 +0100 (BST) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync1.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N5T00MF4IAJI400@eusync1.samsung.com>; Mon, 19 May 2014 11:54:36 +0100 (BST) From: Andrzej Hajda To: linux-kernel@vger.kernel.org (open list) Subject: [PATCH 5/8] drm/exynos/fimc: simplify irq masking function Date: Mon, 19 May 2014 12:54:07 +0200 Message-id: <1400496850-23860-6-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1400496850-23860-1-git-send-email-a.hajda@samsung.com> References: <1400496850-23860-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrGJMWRmVeSWpSXmKPExsVy+t/xy7pvHlUGG0yZLGVxa905VosrX9+z WUy6P4HF4sW9iywWZ5vesFtc3jWHzWLG+X1MFmuP3GW3mDH5JZsDp8f97uNMHn1bVjF6fN4k F8AcxWWTkpqTWZZapG+XwJXx+Mdc1oJ7IhXrXl9kb2CcL9jFyMkhIWAisfX1OVYIW0ziwr31 bF2MXBxCAksZJW5872aBcPqYJK6t7WUDqWIT0JT4u/kmmC0ioCNxvaebGaSIWeAZk8Sdu+vY QRLCAs4Sy1d8Byri4GARUJXY8dMEJMwLFG6ffZ0ZYpucxMljk8E2cwq4SJw4thzMFgKqebzr KPsERt4FjAyrGEVTS5MLipPSc430ihNzi0vz0vWS83M3MULC6usOxqXHrA4xCnAwKvHw/kiv DBZiTSwrrsw9xCjBwawkwrvtBlCINyWxsiq1KD++qDQntfgQIxMHp1QDo0XpX4Z5WVGVm+X6 d+xszv5r2+UTweHCkRZ05Mzm3SG7D374v6LnDOPCLb/XJ5t5s/qm/jp+/7Yl45PLLKVcn5aq KNjNSt30OfT5jj8CDFGCYYsqf2Rsk7iV19Z8rc5E6Of2x+nze6qfWf5cud+6QUdj2gvmLu3p eZfUz56dN8uiY6qaws+fv5VYijMSDbWYi4oTATLmBPgJAgAA Cc: "moderated list:ARM/S5P EXYNOS AR..." , Seung-Woo Kim , dri-devel@lists.freedesktop.org, Andrzej Hajda , Kyungmin Park , Marek Szyprowski X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The name fimc_handle_irq suggests it is irq handler, but the function is for irq mask configuration. The patch renames the function to fimc_mask_irq and removes unused arguments. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index d40b7fb..409775f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c @@ -290,25 +290,18 @@ static void fimc_handle_jpeg(struct fimc_context *ctx, bool enable) fimc_write(cfg, EXYNOS_CIGCTRL); } -static void fimc_handle_irq(struct fimc_context *ctx, bool enable, - bool overflow, bool level) +static void fimc_mask_irq(struct fimc_context *ctx, bool enable) { u32 cfg; - DRM_DEBUG_KMS("enable[%d]overflow[%d]level[%d]\n", - enable, overflow, level); + DRM_DEBUG_KMS("enable[%d]\n", enable); cfg = fimc_read(EXYNOS_CIGCTRL); if (enable) { - cfg &= ~(EXYNOS_CIGCTRL_IRQ_OVFEN | EXYNOS_CIGCTRL_IRQ_LEVEL); - cfg |= EXYNOS_CIGCTRL_IRQ_ENABLE; - if (overflow) - cfg |= EXYNOS_CIGCTRL_IRQ_OVFEN; - if (level) - cfg |= EXYNOS_CIGCTRL_IRQ_LEVEL; + cfg &= ~EXYNOS_CIGCTRL_IRQ_OVFEN; + cfg |= EXYNOS_CIGCTRL_IRQ_ENABLE | EXYNOS_CIGCTRL_IRQ_LEVEL; } else - cfg &= ~(EXYNOS_CIGCTRL_IRQ_OVFEN | EXYNOS_CIGCTRL_IRQ_ENABLE); - + cfg &= ~EXYNOS_CIGCTRL_IRQ_ENABLE; fimc_write(cfg, EXYNOS_CIGCTRL); } @@ -1180,12 +1173,12 @@ static int fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id, /* interrupt enable */ if (buf_type == IPP_BUF_ENQUEUE && fimc_dst_get_buf_seq(ctx) >= FIMC_BUF_START) - fimc_handle_irq(ctx, true, false, true); + fimc_mask_irq(ctx, true); /* interrupt disable */ if (buf_type == IPP_BUF_DEQUEUE && fimc_dst_get_buf_seq(ctx) <= FIMC_BUF_STOP) - fimc_handle_irq(ctx, false, false, true); + fimc_mask_irq(ctx, false); err_unlock: mutex_unlock(&ctx->lock); @@ -1520,7 +1513,7 @@ static int fimc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd) property = &c_node->property; - fimc_handle_irq(ctx, true, false, true); + fimc_mask_irq(ctx, true); for_each_ipp_ops(i) { config = &property->config[i]; @@ -1639,7 +1632,7 @@ static void fimc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd) break; } - fimc_handle_irq(ctx, false, false, true); + fimc_mask_irq(ctx, false); /* reset sequence */ fimc_write(0x0, EXYNOS_CIFCNTSEQ);