diff mbox

[v2,03/18] ARM: dts: video: add command mode display timing DT bindings

Message ID 1400647390-26590-4-git-send-email-yj44.cho@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

YoungJun Cho May 21, 2014, 4:42 a.m. UTC
This patch adds DT bindings for command mode display timing.

Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 .../bindings/video/cmdmode-display-timing.txt      |   64 ++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/video/cmdmode-display-timing.txt
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Patch

diff --git a/Documentation/devicetree/bindings/video/cmdmode-display-timing.txt b/Documentation/devicetree/bindings/video/cmdmode-display-timing.txt
new file mode 100644
index 0000000..7cedfe4
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/cmdmode-display-timing.txt
@@ -0,0 +1,64 @@ 
+cmdmode-display-timing bindings
+===================================
+
+cmdmode-display-timings node
+--------------------------------
+
+required properties:
+ - none
+
+optional properties:
+ - native-mode: The native mode for the display, in case multiple modes are
+		provided. When omitted, assume the first node is the native.
+
+timing subnode
+--------------
+
+required properties:
+ - clock-frequency: display clock in Hz
+ - hactive, vactive: display resolution
+ - cs-setup: clock cycles for the active period of address signal is enabled
+		until chip select is enabled.
+ - wr-setup: clock cycles for the active period of CS signal is enabled until
+		write signal is enabled.
+ - wr-active: clock cycles for the active period of CS is enabled.
+ - wr-hold: clock cycles for the active period of CS is disabled until write
+		signal is disabled.
+
+optional properties:
+
+There are different ways of describing the capabilities of a display. The
+devicetree representation corresponds to the one commonly found in datasheets
+for displays. If a display supports multiple signal timings, the native-mode
+can be specified.
+
+The parameters are defined as:
+
+  VCLK(internal)  __|¯¯¯¯¯¯|_____|¯¯¯¯¯¯|_____|¯¯¯¯¯¯|_____|¯¯¯¯¯¯|_____|¯¯
+                    :            :            :            :            :
+  Address Output  --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX
+                    | CS-SETUP+1 |            :            :            :
+                    |<---------->|            :            :            :
+  Chip Select     ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯|____________:____________:____________|¯¯
+                                 | WR-SETUP+1 |            | WR-HOLD+1  |
+                                 |<---------->|            |<---------->|
+  Write Enable    ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯|____________|¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
+                                              | WR-ACTIVE+1|
+                                              |<---------->|
+  Video Data      ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>--
+
+Example:
+
+	cmdmode-display-timings {
+		native-mode = <&timing0>;
+		timing0: 1080p24 {
+			/* 1920x1080p24 */
+			clock-frequency = <52000000>;
+			hactive = <1920>;
+			vactive = <1080>;
+			cs-setup = <0>;
+			wr-setup = <0>;
+			wr-active = <1>;
+			wr-hold = <0>;
+		};
+	};