From patchwork Tue May 27 18:07:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 4250781 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 611E79F336 for ; Tue, 27 May 2014 18:07:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9D7C2201FA for ; Tue, 27 May 2014 18:07:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AA5B8201BA for ; Tue, 27 May 2014 18:07:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 717116E712; Tue, 27 May 2014 11:07:30 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qc0-f179.google.com (mail-qc0-f179.google.com [209.85.216.179]) by gabe.freedesktop.org (Postfix) with ESMTP id CD8FF6E04B for ; Tue, 27 May 2014 11:07:28 -0700 (PDT) Received: by mail-qc0-f179.google.com with SMTP id r5so6075404qcx.38 for ; Tue, 27 May 2014 11:07:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zEvBvLf1Sfx8eu9H9ni6JYgYn26dLoeZU1w45uF9/zU=; b=Au1btD0DS31yRK1X7UYPpkLxo+7wq3cSX0O2fgn1oX8070x/9sOYQx7qAXYjN5Da5C 6ry1DY5I2pw4nf3RmuBlU3J+MVe4N6viBNdW9fSocE5VkCTx6gdbvJAKgOGl3hDOyO7x 9VV8+BQ4PHhvJy6c7tEwTSlo8hGqrMX0xQ8H77asLvKV/OZyQy3SAIKLslQifT6BQIJC rRC2qBjrmfAgPGa7eHNDPbr/ekNdJFHA0iXXN6LDw+8O/Zs7EIsFarGCi9njnURTQH7L fgXxPzVvGevL7Gx2ShhlVAz1c+1YT+dkTlhgIxsLTFzvmNFIg6Po7sRI4Fgv+6IADwxp RFAw== X-Received: by 10.229.79.2 with SMTP id n2mr44899071qck.11.1401214048346; Tue, 27 May 2014 11:07:28 -0700 (PDT) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPSA id a6sm24607149qag.17.2014.05.27.11.07.27 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 May 2014 11:07:28 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/2] drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devices Date: Tue, 27 May 2014 14:07:21 -0400 Message-Id: <1401214041-3001-2-git-send-email-alexander.deucher@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1401214041-3001-1-git-send-email-alexander.deucher@amd.com> References: <1401214041-3001-1-git-send-email-alexander.deucher@amd.com> Cc: Alex Deucher , stable@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Only DCE5+ asics support DP 1.2. Noticed by ArtForz on IRC. Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org --- drivers/gpu/drm/radeon/atombios_dp.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index 330f8df..225f6c6 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c @@ -291,6 +291,19 @@ static int dp_get_max_dp_pix_clock(int link_rate, /***** radeon specific DP functions *****/ +static int radeon_dp_get_max_link_rate(struct drm_connector *connector, + u8 dpcd[DP_DPCD_SIZE]) +{ + int max_link_rate; + + if (radeon_connector_is_dp12_capable(connector)) + max_link_rate = min(drm_dp_max_link_rate(dpcd), 540000); + else + max_link_rate = min(drm_dp_max_link_rate(dpcd), 270000); + + return max_link_rate; +} + /* First get the min lane# when low rate is used according to pixel clock * (prefer low rate), second check max lane# supported by DP panel, * if the max lane# < low rate lane# then use max lane# instead. @@ -300,7 +313,7 @@ static int radeon_dp_get_dp_lane_number(struct drm_connector *connector, int pix_clock) { int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector)); - int max_link_rate = drm_dp_max_link_rate(dpcd); + int max_link_rate = radeon_dp_get_max_link_rate(connector, dpcd); int max_lane_num = drm_dp_max_lane_count(dpcd); int lane_num; int max_dp_pix_clock; @@ -338,7 +351,7 @@ static int radeon_dp_get_dp_link_clock(struct drm_connector *connector, return 540000; } - return drm_dp_max_link_rate(dpcd); + return radeon_dp_get_max_link_rate(connector, dpcd); } static u8 radeon_dp_encoder_service(struct radeon_device *rdev,