From patchwork Mon Jun 23 05:32:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 4405961 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 92EFBBEEAA for ; Tue, 24 Jun 2014 00:59:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CC2B22034E for ; Tue, 24 Jun 2014 00:59:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0477A20303 for ; Tue, 24 Jun 2014 00:59:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8BC4C6E06C; Mon, 23 Jun 2014 17:59:40 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by gabe.freedesktop.org (Postfix) with ESMTP id 450F16E05F for ; Sun, 22 Jun 2014 22:43:58 -0700 (PDT) Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N7L00M1JWROVV10@mailout3.samsung.com> for dri-devel@lists.freedesktop.org; Mon, 23 Jun 2014 14:33:24 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.124]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id DF.9F.16580.42CB7A35; Mon, 23 Jun 2014 14:33:24 +0900 (KST) X-AuditID: cbfee691-b7f2f6d0000040c4-be-53a7bc2426ea Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 04.69.04943.42CB7A35; Mon, 23 Jun 2014 14:33:24 +0900 (KST) Received: from localhost.localdomain ([107.108.83.245]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N7L00JJKWRH6C90@mmp2.samsung.com>; Mon, 23 Jun 2014 14:33:24 +0900 (KST) From: Rahul Sharma To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/5 v2] drm/exynos: set power state variable after enabling clocks and power Date: Mon, 23 Jun 2014 11:02:21 +0530 Message-id: <1403501545-16482-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1403501545-16482-1-git-send-email-rahul.sharma@samsung.com> References: <1403501545-16482-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrALMWRmVeSWpSXmKPExsWyRsSkRldlz/Jgg46bUhZXvr5ns5h0fwKL xfddX9gtehdcZbOYcX4fk8XCF/EWUxYdZnVg99g56y67x/3u40wefVtWMXp83iQXwBLFZZOS mpNZllqkb5fAlbF48RLWgt2CFf9OHmBpYLzA18XIySEhYCLR8mc+K4QtJnHh3nq2LkYuDiGB pYwS749cZYcperttJVRiOqPE88M/WCGcdiaJj3uWMYNUsQnoSsw++IwRxBYRUJb4O3EVI0gR s8ByRomXm1vYQBLCAnEST9Z9BCtiEVCVmDHpDVicV8BDYk1PO9BUDqB1ChJzJtmAhDkFPCW6 Ln0HKxcCKnn4aAHURf3sEsumc0CMEZD4NvkQC0SrrMSmA8wQJZISB1fcYJnAKLyAkWEVo2hq QXJBcVJ6kalecWJucWleul5yfu4mRmBon/73bOIOxvsHrA8xJgONm8gsJZqcD4yNvJJ4Q2Mz IwtTE1NjI3NLM9KElcR50x8lBQkJpCeWpGanphakFsUXleakFh9iZOLglGpg7NXd6m8x3XL2 nOWcWSkb1zM273U8c3SB0fHYZVf/7i98d6HlesGZ3QeCRIK2TPmyT8n3pvi+mbVXdj9YZvjc 4C1H6PtfaSrTJ8zOSvEr2ZKyeafnswsxXvPtJ8+U+a/75d7CaS8Yn7FY3joyc/e9dQ9dmC2+ z429/uuVQwf/mbaPt/7ZijhunRKpxFKckWioxVxUnAgAZm6k54MCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrAIsWRmVeSWpSXmKPExsVy+t9jQV2VPcuDDZrWC1lc+fqezWLS/Qks Ft93fWG36F1wlc1ixvl9TBYLX8RbTFl0mNWB3WPnrLvsHve7jzN59G1ZxejxeZNcAEtUA6NN RmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2Si0+ArltmDtAFSgpliTml QKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaMxYuXsBbsFqz4d/IASwPjBb4uRk4O CQETibfbVrJB2GISF+6tB7K5OIQEpjNKPD/8gxXCaWeS+LhnGTNIFZuArsTsg88YQWwRAWWJ vxNXMYIUMQssZ5R4ubkFbJSwQJzEk3UfwYpYBFQlZkx6AxbnFfCQWNPTDjSVA2idgsScSTYg YU4BT4muS9/ByoWASh4+WsA+gZF3ASPDKkbR1ILkguKk9FxDveLE3OLSvHS95PzcTYzg2Hkm tYNxZYPFIUYBDkYlHl4Nt+XBQqyJZcWVuYcYJTiYlUR4GxuAQrwpiZVVqUX58UWlOanFhxhN gY6ayCwlmpwPjOu8knhDYxNzU2NTSxMLEzNLJXHeA63WgUIC6YklqdmpqQWpRTB9TBycUg2M XasOSJv/2t2w9WGa31KbS7cbtOv57s67uFJ4pSXjNlbj/Oc3kxWCV02NKjsY7FPJe3X3t4v7 /zCbfupQdXn64/YBeVFe87q+g58eNa/dNmNv82Kxi4/reYL/r93Dprrt9OMzmq6PzYMmeZyx +CmzUKOk3yHtbcO1X6I/Dmj2NXU8SX+/vGpJjRJLcUaioRZzUXEiAFERTvqzAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Mailman-Approved-At: Mon, 23 Jun 2014 17:59:40 -0700 Cc: kgene.kim@samsung.com, joshi@samsung.com, linux-samsung-soc@vger.kernel.org, Rahul Sharma X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Power state variable holds the state of the mixer device. Power on and power off functions are toggling these variable at wrong place. State variable should be changed to true only after Runtime PM and clocks are enabled. Else it may result to a situation where mixer registers are accessed with device power enabled. Similar logic for poweroff sequence. Signed-off-by: Rahul Sharma --- drivers/gpu/drm/exynos/exynos_mixer.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 4c5aed7..c00abbe 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -1061,7 +1061,7 @@ static void mixer_poweron(struct exynos_drm_manager *mgr) mutex_unlock(&ctx->mixer_mutex); return; } - ctx->powered = true; + mutex_unlock(&ctx->mixer_mutex); pm_runtime_get_sync(ctx->dev); @@ -1072,6 +1072,10 @@ static void mixer_poweron(struct exynos_drm_manager *mgr) clk_prepare_enable(res->sclk_mixer); } + mutex_lock(&ctx->mixer_mutex); + ctx->powered = true; + mutex_unlock(&ctx->mixer_mutex); + mixer_reg_write(res, MXR_INT_EN, ctx->int_en); mixer_win_reset(ctx); @@ -1084,14 +1088,20 @@ static void mixer_poweroff(struct exynos_drm_manager *mgr) struct mixer_resources *res = &ctx->mixer_res; mutex_lock(&ctx->mixer_mutex); - if (!ctx->powered) - goto out; + if (!ctx->powered) { + mutex_unlock(&ctx->mixer_mutex); + return; + } mutex_unlock(&ctx->mixer_mutex); mixer_window_suspend(mgr); ctx->int_en = mixer_reg_read(res, MXR_INT_EN); + mutex_lock(&ctx->mixer_mutex); + ctx->powered = false; + mutex_unlock(&ctx->mixer_mutex); + clk_disable_unprepare(res->mixer); if (ctx->vp_enabled) { clk_disable_unprepare(res->vp); @@ -1099,12 +1109,6 @@ static void mixer_poweroff(struct exynos_drm_manager *mgr) } pm_runtime_put_sync(ctx->dev); - - mutex_lock(&ctx->mixer_mutex); - ctx->powered = false; - -out: - mutex_unlock(&ctx->mixer_mutex); } static void mixer_dpms(struct exynos_drm_manager *mgr, int mode)