From patchwork Thu Jul 17 10:01:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Michel_D=C3=A4nzer?= X-Patchwork-Id: 4574311 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1B2EA9F7DE for ; Thu, 17 Jul 2014 10:01:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 37BA5201C8 for ; Thu, 17 Jul 2014 10:01:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5C73C2018E for ; Thu, 17 Jul 2014 10:01:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 427A688EAA; Thu, 17 Jul 2014 03:01:28 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.gna.ch (darkcity.gna.ch [195.226.6.51]) by gabe.freedesktop.org (Postfix) with ESMTP id DB6FA6E249; Thu, 17 Jul 2014 03:01:25 -0700 (PDT) Received: from kaveri (125-14-38-183.rev.home.ne.jp [125.14.38.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by darkcity.gna.ch (Postfix) with ESMTPSA id F0D3AC088B; Thu, 17 Jul 2014 12:00:30 +0200 (CEST) Received: from daenzer by kaveri with local (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1X7iV4-0003mO-SC; Thu, 17 Jul 2014 19:01:18 +0900 From: =?UTF-8?q?Michel=20D=C3=A4nzer?= To: dri-devel@lists.freedesktop.org, mesa-dev@lists.freedesktop.org Subject: [PATCH 5/5] drm/radeon: Use VRAM for indirect buffers on >= SI Date: Thu, 17 Jul 2014 19:01:10 +0900 Message-Id: <1405591275-14461-6-git-send-email-michel@daenzer.net> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1405591275-14461-1-git-send-email-michel@daenzer.net> References: <1405591275-14461-1-git-send-email-michel@daenzer.net> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Michel Dänzer Signed-off-by: Michel Dänzer --- drivers/gpu/drm/radeon/cik.c | 3 +++ drivers/gpu/drm/radeon/cik_sdma.c | 2 ++ drivers/gpu/drm/radeon/ni.c | 3 +++ drivers/gpu/drm/radeon/ni_dma.c | 2 ++ drivers/gpu/drm/radeon/radeon_ring.c | 2 +- 5 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index df39095..8af5c9a 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -3846,6 +3846,9 @@ void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) (ib->gpu_addr & 0xFFFFFFFC)); radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF); radeon_ring_write(ring, control); + + /* Flush HDP cache */ + WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0); } /** diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 3396b28..2ab873d 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c @@ -158,6 +158,8 @@ void cik_sdma_ring_ib_execute(struct radeon_device *rdev, radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); radeon_ring_write(ring, ib->length_dw); + /* Flush HDP cache */ + WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0); } /** diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index b589fe7..ea58e5b 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -1397,6 +1397,9 @@ void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) radeon_ring_write(ring, 0xFFFFFFFF); radeon_ring_write(ring, 0); radeon_ring_write(ring, ((ib->vm ? ib->vm->id : 0) << 24) | 10); /* poll interval */ + + /* Flush HDP cache (for SI) */ + WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); } static void cayman_cp_enable(struct radeon_device *rdev, bool enable) diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index 119fc69..0e575ea 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c @@ -148,6 +148,8 @@ void cayman_dma_ring_ib_execute(struct radeon_device *rdev, radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); + /* Flush HDP cache (for SI) */ + WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); } /** diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 62e9e57..31ac4fd 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c @@ -206,7 +206,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev) r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo, RADEON_IB_POOL_SIZE*64*1024, RADEON_GPU_PAGE_SIZE, - RADEON_GEM_DOMAIN_GTT, + RADEON_GEM_DOMAIN_VRAM, RADEON_GEM_GTT_WC); } else { /* Without GPUVM, it's better to stick to cacheable GTT due