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[3/9] drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx()

Message ID 1409817017.4246.36.camel@pasglop (mailing list archive)
State New, archived
Headers show

Commit Message

Benjamin Herrenschmidt Sept. 4, 2014, 7:50 a.m. UTC
If the P2A has been used to target other SOC registers before that
call, we're going to hit the wrong place so make sure we set the
base address up properly before using it.

(P2A stands for PCIe to AHB bridge and is the bride that allows
accessing the AST's internal AHB bus using a relocatable 64k
window in the second half of the PCIe MMIO BAR)

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
 drivers/gpu/drm/ast/ast_dp501.c | 11 +++++++++++
 1 file changed, 11 insertions(+)
diff mbox

Patch

diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c
index 5da4b62..7e2ddde 100644
--- a/drivers/gpu/drm/ast/ast_dp501.c
+++ b/drivers/gpu/drm/ast/ast_dp501.c
@@ -400,7 +400,18 @@  void ast_init_3rdtx(struct drm_device *dev)
 			if (ast->tx_chip_type == AST_TX_SIL164)
 				ast_init_dvo(dev);
 			else {
+				/*
+				 * Set DAC source to VGA mode in SCU2C via the P2A
+				 * bridge. First configure the P2U to target the SCU
+				 * in case it isn't at this stage.
+				 */
+				ast_write32(ast, 0xf004, 0x1e6e0000);
+				ast_write32(ast, 0xf000, 0x1);
+				/* Then unlock the SCU with the magic password */
 				ast_write32(ast, 0x12000, 0x1688a8a8);
+				ast_write32(ast, 0x12000, 0x1688a8a8);
+				ast_write32(ast, 0x12000, 0x1688a8a8);
+				/* Finally, clear bits [17:16] of SCU2c */
 				data = ast_read32(ast, 0x1202c);
 				data &= 0xfffcffff;
 				ast_write32(ast, 0, data);