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[1/2] drm/nouveau/disp/nv50: Add PFB writes

Message ID 1411637791-4274-1-git-send-email-pierre.morrow@free.fr (mailing list archive)
State New, archived
Headers show

Commit Message

Pierre Moreau Sept. 25, 2014, 9:36 a.m. UTC 
This fix a GPU lockup on 9400M (NVAC) when using acceleration, see #27501.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
---
 drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 9 +++++++++
 1 file changed, 9 insertions(+)
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Patch

diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
index a7efbff..e425604 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -1137,6 +1137,15 @@  nv50_disp_base_init(struct nouveau_object *object)
 	if (ret)
 		return ret;
 
+	if (nv_device(priv)->chipset == 0xac) {
+		nv_mask(priv, 0x100c18, 0x00000000, 0x000027ff);
+		nv_mask(priv, 0x100c14, 0x00000000, 0x00000001);
+		nv_mask(priv, 0x100c1c, 0x00000000, 0x000027fc);
+		nv_mask(priv, 0x100c14, 0x00000000, 0x00000002);
+		nv_mask(priv, 0x100c24, 0x00000002, 0x000027fd);
+		nv_mask(priv, 0x100c14, 0x00000000, 0x00010000);
+	}
+
 	/* The below segments of code copying values from one register to
 	 * another appear to inform EVO of the display capabilities or
 	 * something similar.  NFI what the 0x614004 caps are for..