From patchwork Mon Oct 13 10:16:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 5075001 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1A0C4C11AC for ; Mon, 13 Oct 2014 10:17:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B206C201F7 for ; Mon, 13 Oct 2014 10:17:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CBD9F201C7 for ; Mon, 13 Oct 2014 10:17:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0FAE389F69; Mon, 13 Oct 2014 03:17:02 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wi0-f180.google.com (mail-wi0-f180.google.com [209.85.212.180]) by gabe.freedesktop.org (Postfix) with ESMTP id 71F0589F2E for ; Mon, 13 Oct 2014 03:16:57 -0700 (PDT) Received: by mail-wi0-f180.google.com with SMTP id em10so6973228wid.7 for ; Mon, 13 Oct 2014 03:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fGRjOfIDQ1UUA2J7RYe99tsiFI6SNN/rQ38SZAOhFaM=; b=eO3OPWgVSecmQ/cveZS3gWAsqZtMfxyL9cdururwf9XeqG8cWUPLyPv8NvOdt7M/Kd eN4IZbl/7Dn1gd5JiVVTrhE0RXlEpTi87SUCYCXpHEwEaTUfxK9MA/BbR1zTmsL2AC+P +7Lhoo/hQVQBLaDO7PaCQSVeYZVIw6Yb7PriNrK7aaGSL3Cqm8miWa3WLexbpUfUHAu1 Te7Bx/VDZ1LaMj8mfJai1sKRhuUEO9Dda9f/68Fgd4WwKPlKKdcPp83GG5/idD1otOGY FOaGqG6iKpAB4q8yNDv2p71Bl6cMvqZJo7B5yOk2CqNz+61SZbP8pAWu9tnnFd8dwRE6 oZqw== X-Received: by 10.180.101.100 with SMTP id ff4mr18958299wib.43.1413195416632; Mon, 13 Oct 2014 03:16:56 -0700 (PDT) Received: from localhost (port-4359.pppoe.wtnet.de. [84.46.17.24]) by mx.google.com with ESMTPSA id gt7sm11633863wib.18.2014.10.13.03.16.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Oct 2014 03:16:56 -0700 (PDT) From: Thierry Reding To: dri-devel@lists.freedesktop.org Subject: [PATCH 12/15] drm/dsi: Implement DCS set_{column, page}_address commands Date: Mon, 13 Oct 2014 12:16:32 +0200 Message-Id: <1413195395-3355-12-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: <1413195395-3355-1-git-send-email-thierry.reding@gmail.com> References: <1413195395-3355-1-git-send-email-thierry.reding@gmail.com> Cc: Andrzej Hajda X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding Provide small convenience wrappers to set the column and page extents of the frame memory accessed by the host processors. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 46 ++++++++++++++++++++++++++++++++++++++++++ include/drm/drm_mipi_dsi.h | 4 ++++ 2 files changed, 50 insertions(+) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index d7ca57f1fdd3..d4d3cf752be7 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -671,6 +671,52 @@ int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi) EXPORT_SYMBOL(mipi_dsi_dcs_set_display_on); /** + * mipi_dsi_dcs_set_column_address() - define the column extent of the frame + * memory accessed by the host processor + * @dsi: DSI peripheral device + * @start: first column of frame memory + * @end: last column of frame memory + * + * Return: 0 on success or a negative error code on failure. + */ +int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start, + u16 end) +{ + u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff }; + ssize_t err; + + err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_COLUMN_ADDRESS, payload, + sizeof(payload)); + if (err < 0) + return err; + + return 0; +} + +/** + * mipi_dsi_dcs_set_page_address() - define the page extent of the frame + * memory accessed by the host processor + * @dsi: DSI peripheral device + * @start: first page of frame memory + * @end: last page of frame memory + * + * Return: 0 on success or a negative error code on failure. + */ +int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start, + u16 end) +{ + u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff }; + ssize_t err; + + err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PAGE_ADDRESS, payload, + sizeof(payload)); + if (err < 0) + return err; + + return 0; +} + +/** * mipi_dsi_dcs_set_tear_off() - turn off the display module's Tearing Effect * output signal on the TE signal line * @dsi: DSI peripheral device diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 968085b1ef73..17ef2fbb09a5 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -184,6 +184,10 @@ int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi); int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi); int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi); int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi); +int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start, + u16 end); +int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start, + u16 end); int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi); int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode);