From patchwork Fri Oct 31 22:54:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 5207611 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6AD83C11AC for ; Fri, 31 Oct 2014 23:57:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A1814201B9 for ; Fri, 31 Oct 2014 23:57:17 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7B4C720173 for ; Fri, 31 Oct 2014 23:57:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D57A16E862; Fri, 31 Oct 2014 16:56:39 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pa0-f47.google.com (mail-pa0-f47.google.com [209.85.220.47]) by gabe.freedesktop.org (Postfix) with ESMTP id D941C6E851 for ; Fri, 31 Oct 2014 15:57:03 -0700 (PDT) Received: by mail-pa0-f47.google.com with SMTP id kx10so8536979pab.6 for ; Fri, 31 Oct 2014 15:57:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d4t8S+Jfm/9IKIkPpgNd89BujSF6H2UgaK+TsagCFvk=; b=zTasYcTOS8ZEX+fwdeUwM7XFLDdjleMyaNfL+WxsxuGX6xxPp/21i5pCWvkakrWG23 P0fbEfbqFTBZK7o6fGIGB+lm25QyPRPlax5t9BSx4nZZshUVfqMzo78qiekveOGTAm4C 49qWI1QGT1BQLotmorOvgwTi/0oFrk2Zm1vCA2jcNdEz4k7FA70jI6KptmpgpliEIck1 n+tfNwJc9G1Lu84gxfXKk69XHDFfhdv29zKrd4DvTz7uQOL5UhgnVmMJN5DlxpI9NIii B9dRa8/lGDaMGvKuf89Dl9WvyCUUFo/RFt9ipcNsH3SCbOrV6hQAM6Wd2WauDoTuQ5fW bQWA== X-Received: by 10.70.15.228 with SMTP id a4mr27899424pdd.77.1414796223776; Fri, 31 Oct 2014 15:57:03 -0700 (PDT) Received: from mothership.mgc.mentorg.com (c-50-152-159-227.hsd1.ca.comcast.net. [50.152.159.227]) by mx.google.com with ESMTPSA id ev8sm10870656pdb.28.2014.10.31.15.57.03 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 31 Oct 2014 15:57:03 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: dri-devel@lists.freedesktop.org Subject: [PATCH 19/72] gpu: ipu-v3: Protect more CM reg access with IPU lock Date: Fri, 31 Oct 2014 15:54:02 -0700 Message-Id: <1414796095-10107-20-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> References: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> X-Mailman-Approved-At: Fri, 31 Oct 2014 16:56:31 -0700 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some cm_reg accesses were not being protected by the IPU spin lock. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-common.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index f707d25..d3af206 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -46,11 +46,16 @@ static inline void ipu_cm_write(struct ipu_soc *ipu, u32 value, unsigned offset) void ipu_srm_dp_sync_update(struct ipu_soc *ipu) { + unsigned long flags; u32 val; + spin_lock_irqsave(&ipu->lock, flags); + val = ipu_cm_read(ipu, IPU_SRM_PRI2); val |= 0x8; ipu_cm_write(ipu, val, IPU_SRM_PRI2); + + spin_unlock_irqrestore(&ipu->lock, flags); } EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update); @@ -451,8 +456,17 @@ int ipu_idmac_get_current_buffer(struct ipuv3_channel *channel) { struct ipu_soc *ipu = channel->ipu; unsigned int chno = channel->num; + unsigned long flags; + int ret; + + spin_lock_irqsave(&ipu->lock, flags); - return (ipu_cm_read(ipu, IPU_CHA_CUR_BUF(chno)) & idma_mask(chno)) ? 1 : 0; + ret = (ipu_cm_read(ipu, IPU_CHA_CUR_BUF(chno)) & idma_mask(chno)) ? + 1 : 0; + + spin_unlock_irqrestore(&ipu->lock, flags); + + return ret; } EXPORT_SYMBOL_GPL(ipu_idmac_get_current_buffer); @@ -569,10 +583,14 @@ EXPORT_SYMBOL_GPL(ipu_idmac_wait_busy); int ipu_wait_interrupt(struct ipu_soc *ipu, int irq, int ms) { - unsigned long timeout; + unsigned long flags, timeout; timeout = jiffies + msecs_to_jiffies(ms); + + spin_lock_irqsave(&ipu->lock, flags); ipu_cm_write(ipu, BIT(irq % 32), IPU_INT_STAT(irq / 32)); + spin_unlock_irqrestore(&ipu->lock, flags); + while (!(ipu_cm_read(ipu, IPU_INT_STAT(irq / 32) & BIT(irq % 32)))) { if (time_after(jiffies, timeout)) return -ETIMEDOUT;