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[21/72] gpu: ipu-v3: Update DP sync SRM always in ipu_dp_enable_channel()

Message ID 1414796095-10107-22-git-send-email-steve_longerbeam@mentor.com (mailing list archive)
State New, archived
Headers show

Commit Message

Steve Longerbeam Oct. 31, 2014, 10:54 p.m. UTC 
In Freescale kernels, when a DP channel is enabled, the DP sync
SRM is updated for both background and foreground DP channels. Do
the same.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-dp.c |   11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)
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Patch

diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
index d918596..a31b4a5 100644
--- a/drivers/gpu/ipu-v3/ipu-dp.c
+++ b/drivers/gpu/ipu-v3/ipu-dp.c
@@ -388,14 +388,13 @@  int ipu_dp_enable_channel(struct ipu_dp *dp)
 	struct ipu_dp_priv *priv = flow->priv;
 	u32 reg;
 
-	if (!dp->foreground)
-		return 0;
-
 	mutex_lock(&priv->mutex);
 
-	reg = readl(flow->base + DP_COM_CONF);
-	reg |= DP_COM_CONF_FG_EN;
-	writel(reg, flow->base + DP_COM_CONF);
+	if (dp->foreground) {
+		reg = readl(flow->base + DP_COM_CONF);
+		reg |= DP_COM_CONF_FG_EN;
+		writel(reg, flow->base + DP_COM_CONF);
+	}
 
 	ipu_srm_dp_sync_update(priv->ipu);