From patchwork Fri Oct 31 22:54:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 5207251 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D94EE9F318 for ; Fri, 31 Oct 2014 23:56:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C9FB520120 for ; Fri, 31 Oct 2014 23:56:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6666F20172 for ; Fri, 31 Oct 2014 23:56:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 331C76E84D; Fri, 31 Oct 2014 16:56:33 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pd0-f174.google.com (mail-pd0-f174.google.com [209.85.192.174]) by gabe.freedesktop.org (Postfix) with ESMTP id A65696E84D for ; Fri, 31 Oct 2014 15:57:06 -0700 (PDT) Received: by mail-pd0-f174.google.com with SMTP id p10so8029820pdj.5 for ; Fri, 31 Oct 2014 15:57:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DtQ+v4XZ2S8fGfkJsrkSkopeDcartriBmM7Knjvau/E=; b=Lp6Hhya0Vjqg04+VkFm/mm48+sU6NdW39WSMXmivusp0U7unNt/Ja2K8GKVm/0IMS0 oeI/fEuii16vJ0i6EcM4/oL7dUHc9ACK006gD4im3D4jgLSlokzuJbKLDrQwK/LGxJ11 vRqyf+hiEfRwNj+44bL+Kvwi2xZXiP+goQ1zl4WyNG79uEfKZr56YeS0uKTdmalSuyLe yE5cTCjo9sk10xRyMVFf35k9RHIVmqgdqUcU6MCchfDWcBOrLmDX6pGSv6aer5lOrIDK pg2B1u8AQQTem+GeoZ0ar4asUBBv8hrCzxZ1Ykz14vN60OrWXlqtXj9fJ/xzvbWd2tPw KjWw== X-Received: by 10.70.103.204 with SMTP id fy12mr27402612pdb.110.1414796226555; Fri, 31 Oct 2014 15:57:06 -0700 (PDT) Received: from mothership.mgc.mentorg.com (c-50-152-159-227.hsd1.ca.comcast.net. [50.152.159.227]) by mx.google.com with ESMTPSA id ev8sm10870656pdb.28.2014.10.31.15.57.05 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 31 Oct 2014 15:57:06 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: dri-devel@lists.freedesktop.org Subject: [PATCH 22/72] gpu: ipu-v3: Fix indent/ws in ipu-dmfc Date: Fri, 31 Oct 2014 15:54:05 -0700 Message-Id: <1414796095-10107-23-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> References: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> X-Mailman-Approved-At: Fri, 31 Oct 2014 16:56:31 -0700 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Cleanup indentation and whitespace in ipu-dmfc.c. No functional changes. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-dmfc.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c index 9ab9c87..307020e 100644 --- a/drivers/gpu/ipu-v3/ipu-dmfc.c +++ b/drivers/gpu/ipu-v3/ipu-dmfc.c @@ -125,6 +125,7 @@ struct ipu_dmfc_priv { int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc) { struct ipu_dmfc_priv *priv = dmfc->priv; + mutex_lock(&priv->mutex); if (!priv->use_count) { @@ -176,14 +177,14 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc) EXPORT_SYMBOL_GPL(ipu_dmfc_disable_channel); static int ipu_dmfc_setup_channel(struct dmfc_channel *dmfc, int slots, - int segment, int burstsize) + int segment, int burstsize) { struct ipu_dmfc_priv *priv = dmfc->priv; u32 val, field; dev_dbg(priv->dev, - "dmfc: using %d slots starting from segment %d for IPU channel %d\n", - slots, segment, dmfc->data->ipu_channel); + "dmfc: using %d slots starting from segment %d for IPU channel %d\n", + slots, segment, dmfc->data->ipu_channel); switch (slots) { case 1: @@ -235,7 +236,7 @@ static int ipu_dmfc_setup_channel(struct dmfc_channel *dmfc, int slots, } static int dmfc_bandwidth_to_slots(struct ipu_dmfc_priv *priv, - unsigned long bandwidth) + unsigned long bandwidth) { int slots = 1; @@ -272,7 +273,7 @@ void ipu_dmfc_free_bandwidth(struct dmfc_channel *dmfc) int i; dev_dbg(priv->dev, "dmfc: freeing %d slots starting from segment %d\n", - dmfc->slots, dmfc->segment); + dmfc->slots, dmfc->segment); mutex_lock(&priv->mutex); @@ -299,9 +300,9 @@ void ipu_dmfc_free_bandwidth(struct dmfc_channel *dmfc) for (i = 0; i < DMFC_NUM_CHANNELS; i++) { if (priv->channels[i].slots > 0) ipu_dmfc_setup_channel(&priv->channels[i], - priv->channels[i].slots, - priv->channels[i].segment, - priv->channels[i].burstsize); + priv->channels[i].slots, + priv->channels[i].segment, + priv->channels[i].burstsize); } out: mutex_unlock(&priv->mutex); @@ -309,15 +310,16 @@ out: EXPORT_SYMBOL_GPL(ipu_dmfc_free_bandwidth); int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc, - unsigned long bandwidth_pixel_per_second, int burstsize) + unsigned long bandwidth_pixel_per_second, + int burstsize) { struct ipu_dmfc_priv *priv = dmfc->priv; int slots = dmfc_bandwidth_to_slots(priv, bandwidth_pixel_per_second); int segment = -1, ret = 0; - dev_dbg(priv->dev, "dmfc: trying to allocate %ldMpixel/s for IPU channel %d\n", - bandwidth_pixel_per_second / 1000000, - dmfc->data->ipu_channel); + dev_dbg(priv->dev, + "dmfc: trying to allocate %ldMpixel/s for IPU channel %d\n", + bandwidth_pixel_per_second / 1000000, dmfc->data->ipu_channel); ipu_dmfc_free_bandwidth(dmfc); @@ -390,7 +392,7 @@ void ipu_dmfc_put(struct dmfc_channel *dmfc) EXPORT_SYMBOL_GPL(ipu_dmfc_put); int ipu_dmfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, - struct clk *ipu_clk) + struct clk *ipu_clk) { struct ipu_dmfc_priv *priv; int i; @@ -425,7 +427,7 @@ int ipu_dmfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, priv->bandwidth_per_slot = clk_get_rate(ipu_clk) * 4 / 8; dev_dbg(dev, "dmfc: 8 slots with %ldMpixel/s bandwidth each\n", - priv->bandwidth_per_slot / 1000000); + priv->bandwidth_per_slot / 1000000); writel(0x202020f6, priv->base + DMFC_WR_CHAN_DEF); writel(0x2020f6f6, priv->base + DMFC_DP_CHAN_DEF);