@@ -176,6 +176,21 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc)
}
EXPORT_SYMBOL_GPL(ipu_dmfc_disable_channel);
+static void dmfc_set_wait_eot(struct dmfc_channel *dmfc, int width)
+{
+ struct ipu_dmfc_priv *priv = dmfc->priv;
+ u32 dmfc_gen1;
+
+ dmfc_gen1 = readl(priv->base + DMFC_GENERAL1);
+
+ if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines)
+ dmfc_gen1 |= 1 << dmfc->data->eot_shift;
+ else
+ dmfc_gen1 &= ~(1 << dmfc->data->eot_shift);
+
+ writel(dmfc_gen1, priv->base + DMFC_GENERAL1);
+}
+
static int ipu_dmfc_setup_channel(struct dmfc_channel *dmfc, int slots,
int segment, int burstsize)
{
@@ -312,7 +327,7 @@ EXPORT_SYMBOL_GPL(ipu_dmfc_free_bandwidth);
int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc,
unsigned long bandwidth_pixel_per_second,
- int burstsize)
+ int width, int burstsize)
{
struct ipu_dmfc_priv *priv = dmfc->priv;
int slots = dmfc_bandwidth_to_slots(priv, bandwidth_pixel_per_second);
@@ -347,7 +362,11 @@ int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc,
goto out;
}
- ipu_dmfc_setup_channel(dmfc, slots, segment, burstsize);
+ ret = ipu_dmfc_setup_channel(dmfc, slots, segment, burstsize);
+ if (ret)
+ goto out;
+
+ dmfc_set_wait_eot(dmfc, width);
out:
mutex_unlock(&priv->mutex);
@@ -356,24 +375,6 @@ out:
}
EXPORT_SYMBOL_GPL(ipu_dmfc_alloc_bandwidth);
-int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width)
-{
- struct ipu_dmfc_priv *priv = dmfc->priv;
- u32 dmfc_gen1;
-
- dmfc_gen1 = readl(priv->base + DMFC_GENERAL1);
-
- if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines)
- dmfc_gen1 |= 1 << dmfc->data->eot_shift;
- else
- dmfc_gen1 &= ~(1 << dmfc->data->eot_shift);
-
- writel(dmfc_gen1, priv->base + DMFC_GENERAL1);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(ipu_dmfc_init_channel);
-
struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipu_channel)
{
struct ipu_dmfc_priv *priv = ipu->dmfc_priv;
@@ -158,15 +158,9 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
break;
}
- ret = ipu_dmfc_init_channel(ipu_plane->dmfc, crtc_w);
- if (ret) {
- dev_err(dev, "initializing dmfc channel failed with %d\n", ret);
- return ret;
- }
-
ret = ipu_dmfc_alloc_bandwidth(ipu_plane->dmfc,
calc_bandwidth(crtc_w, crtc_h,
- calc_vref(mode)), 64);
+ calc_vref(mode)), crtc_w, 64);
if (ret) {
dev_err(dev, "allocating dmfc bandwidth failed with %d\n", ret);
return ret;
@@ -271,9 +271,8 @@ struct dmfc_channel;
int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc);
void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc);
int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc,
- unsigned long bandwidth_mbs, int burstsize);
+ unsigned long bandwidth, int width, int burstsize);
void ipu_dmfc_free_bandwidth(struct dmfc_channel *dmfc);
-int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width);
struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipuv3_channel);
void ipu_dmfc_put(struct dmfc_channel *dmfc);
The function ipu_dmfc_init_channel() sets the "WAIT4EOT" mode according to the line width and the DMFC channel's FIFO size (the slots parameter). But this can only happen after slots has been calculated in ipu_dmfc_alloc_bandwidth(). Fix by renaming ipu_dmfc_init_channel() to a static dmfc_set_wait_eot() which is called at the end of ipu_dmfc_alloc_bandwidth(), after slots has been calculated. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> --- drivers/gpu/ipu-v3/ipu-dmfc.c | 41 +++++++++++++++++---------------- drivers/staging/imx-drm/ipuv3-plane.c | 8 +------ include/video/imx-ipu-v3.h | 3 +-- 3 files changed, 23 insertions(+), 29 deletions(-)