From patchwork Fri Oct 31 22:54:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 5207631 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 252F79F387 for ; Fri, 31 Oct 2014 23:57:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 34C45201C7 for ; Fri, 31 Oct 2014 23:57:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 37B1B20172 for ; Fri, 31 Oct 2014 23:57:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E69486E89D; Fri, 31 Oct 2014 16:56:42 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pd0-f181.google.com (mail-pd0-f181.google.com [209.85.192.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 44A396E84A for ; Fri, 31 Oct 2014 15:57:08 -0700 (PDT) Received: by mail-pd0-f181.google.com with SMTP id y10so8117135pdj.12 for ; Fri, 31 Oct 2014 15:57:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qNrv+xWbR85E2rCSFNXH3Yr54wh6JadaiwQB49pJayc=; b=A6qlvkaTbPXYKrMY6MIoXK5ZtxGCCORkcHy7E3+/ErD2f27DckDoFzLNGhGJ4BTJ0o azrsS4tBjim0+GE+r6hAs0LMLyU/5NVqncwH82RoxCRfKfk/poGXacUwvaOYqQ0Gg/fB HCMM3zsfNTB1jyKUL2zKu4oUeabuAvC98L37DE6OIEyC9EFMqi2rPeYV9tYN5ipVvH9e 7dZbeOrAGVYBMTbU637MFpg7e9ViLY9UoaKWG7vyK243To9nfcnoGwPJ2is+8C2z7u3U rzLqq8L8ypGgaoBn7uDKd+ON7hFjC4mnlU+0+6TEqtAJyJQ8FhvA1/z4HD1gNWXbOi6g TPFA== X-Received: by 10.70.131.199 with SMTP id oo7mr14313543pdb.138.1414796228095; Fri, 31 Oct 2014 15:57:08 -0700 (PDT) Received: from mothership.mgc.mentorg.com (c-50-152-159-227.hsd1.ca.comcast.net. [50.152.159.227]) by mx.google.com with ESMTPSA id ev8sm10870656pdb.28.2014.10.31.15.57.07 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 31 Oct 2014 15:57:07 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: dri-devel@lists.freedesktop.org Subject: [PATCH 24/72] gpu: ipu-v3: Remove ipu_dmfc_init_channel() Date: Fri, 31 Oct 2014 15:54:07 -0700 Message-Id: <1414796095-10107-25-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> References: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> X-Mailman-Approved-At: Fri, 31 Oct 2014 16:56:31 -0700 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The function ipu_dmfc_init_channel() sets the "WAIT4EOT" mode according to the line width and the DMFC channel's FIFO size (the slots parameter). But this can only happen after slots has been calculated in ipu_dmfc_alloc_bandwidth(). Fix by renaming ipu_dmfc_init_channel() to a static dmfc_set_wait_eot() which is called at the end of ipu_dmfc_alloc_bandwidth(), after slots has been calculated. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-dmfc.c | 41 +++++++++++++++++---------------- drivers/staging/imx-drm/ipuv3-plane.c | 8 +------ include/video/imx-ipu-v3.h | 3 +-- 3 files changed, 23 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-dmfc.c b/drivers/gpu/ipu-v3/ipu-dmfc.c index 37a0e41..6ef4932 100644 --- a/drivers/gpu/ipu-v3/ipu-dmfc.c +++ b/drivers/gpu/ipu-v3/ipu-dmfc.c @@ -176,6 +176,21 @@ void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc) } EXPORT_SYMBOL_GPL(ipu_dmfc_disable_channel); +static void dmfc_set_wait_eot(struct dmfc_channel *dmfc, int width) +{ + struct ipu_dmfc_priv *priv = dmfc->priv; + u32 dmfc_gen1; + + dmfc_gen1 = readl(priv->base + DMFC_GENERAL1); + + if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines) + dmfc_gen1 |= 1 << dmfc->data->eot_shift; + else + dmfc_gen1 &= ~(1 << dmfc->data->eot_shift); + + writel(dmfc_gen1, priv->base + DMFC_GENERAL1); +} + static int ipu_dmfc_setup_channel(struct dmfc_channel *dmfc, int slots, int segment, int burstsize) { @@ -312,7 +327,7 @@ EXPORT_SYMBOL_GPL(ipu_dmfc_free_bandwidth); int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc, unsigned long bandwidth_pixel_per_second, - int burstsize) + int width, int burstsize) { struct ipu_dmfc_priv *priv = dmfc->priv; int slots = dmfc_bandwidth_to_slots(priv, bandwidth_pixel_per_second); @@ -347,7 +362,11 @@ int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc, goto out; } - ipu_dmfc_setup_channel(dmfc, slots, segment, burstsize); + ret = ipu_dmfc_setup_channel(dmfc, slots, segment, burstsize); + if (ret) + goto out; + + dmfc_set_wait_eot(dmfc, width); out: mutex_unlock(&priv->mutex); @@ -356,24 +375,6 @@ out: } EXPORT_SYMBOL_GPL(ipu_dmfc_alloc_bandwidth); -int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width) -{ - struct ipu_dmfc_priv *priv = dmfc->priv; - u32 dmfc_gen1; - - dmfc_gen1 = readl(priv->base + DMFC_GENERAL1); - - if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines) - dmfc_gen1 |= 1 << dmfc->data->eot_shift; - else - dmfc_gen1 &= ~(1 << dmfc->data->eot_shift); - - writel(dmfc_gen1, priv->base + DMFC_GENERAL1); - - return 0; -} -EXPORT_SYMBOL_GPL(ipu_dmfc_init_channel); - struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipu_channel) { struct ipu_dmfc_priv *priv = ipu->dmfc_priv; diff --git a/drivers/staging/imx-drm/ipuv3-plane.c b/drivers/staging/imx-drm/ipuv3-plane.c index 798125e..365cdfe 100644 --- a/drivers/staging/imx-drm/ipuv3-plane.c +++ b/drivers/staging/imx-drm/ipuv3-plane.c @@ -158,15 +158,9 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, break; } - ret = ipu_dmfc_init_channel(ipu_plane->dmfc, crtc_w); - if (ret) { - dev_err(dev, "initializing dmfc channel failed with %d\n", ret); - return ret; - } - ret = ipu_dmfc_alloc_bandwidth(ipu_plane->dmfc, calc_bandwidth(crtc_w, crtc_h, - calc_vref(mode)), 64); + calc_vref(mode)), crtc_w, 64); if (ret) { dev_err(dev, "allocating dmfc bandwidth failed with %d\n", ret); return ret; diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h index 31b6fde..0eb7468 100644 --- a/include/video/imx-ipu-v3.h +++ b/include/video/imx-ipu-v3.h @@ -271,9 +271,8 @@ struct dmfc_channel; int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc); void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc); int ipu_dmfc_alloc_bandwidth(struct dmfc_channel *dmfc, - unsigned long bandwidth_mbs, int burstsize); + unsigned long bandwidth, int width, int burstsize); void ipu_dmfc_free_bandwidth(struct dmfc_channel *dmfc); -int ipu_dmfc_init_channel(struct dmfc_channel *dmfc, int width); struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipuv3_channel); void ipu_dmfc_put(struct dmfc_channel *dmfc);