From patchwork Fri Oct 31 22:54:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 5207531 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 24766C11AF for ; Fri, 31 Oct 2014 23:57:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 46E8620173 for ; Fri, 31 Oct 2014 23:57:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5DFA4201C7 for ; Fri, 31 Oct 2014 23:57:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 58CA86E88D; Fri, 31 Oct 2014 16:56:42 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pd0-f169.google.com (mail-pd0-f169.google.com [209.85.192.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D0C76E849 for ; Fri, 31 Oct 2014 15:57:11 -0700 (PDT) Received: by mail-pd0-f169.google.com with SMTP id y10so8089158pdj.14 for ; Fri, 31 Oct 2014 15:57:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FMQwNXFqZW9d/AGHUiRmjo34hSyNhdH1I1XYMDadid0=; b=Lwxu6sz1NHEHnjULwARzBGG08wMH0BYUBhKOPIMiNkXZkn7GOLnfZupGW//aYO2UVT YxLl/2xuW9pdFq4y7d8EqsDSs3jrgqB18YhBfkXJWyxOAPYX0/IV8/PsPzusa5DAf4HT bkzXVlnURwht1bZ/yO7ao4FHvc1zf0syy19ywft1YURoMeKiKIRq73Hq5cxZzY2nFXjH b4LCFHKxtcC8ol++UwULnQY2h3yt2WHL5XY/R+8Z4vtFGKV1rVobUO/otQMUk+URvilr d6Rw3XBO0Eu302C73FBvDz8SoYsTmGZVyV43q8r/zuh8qusoaMs+lTC8lWJLuzEq46cm y0cg== X-Received: by 10.68.226.226 with SMTP id rv2mr27793914pbc.77.1414796231455; Fri, 31 Oct 2014 15:57:11 -0700 (PDT) Received: from mothership.mgc.mentorg.com (c-50-152-159-227.hsd1.ca.comcast.net. [50.152.159.227]) by mx.google.com with ESMTPSA id ev8sm10870656pdb.28.2014.10.31.15.57.10 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 31 Oct 2014 15:57:11 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: dri-devel@lists.freedesktop.org Subject: [PATCH 28/72] gpu: ipu-di: Add and improve debug/error messages Date: Fri, 31 Oct 2014 15:54:11 -0700 Message-Id: <1414796095-10107-29-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> References: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> X-Mailman-Approved-At: Fri, 31 Oct 2014 16:56:31 -0700 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a couple error messages to ipu_di_init() for better IPU load/unload debug. Add more debug messages. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-di.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index 70bf594..47615ce 100644 --- a/drivers/gpu/ipu-v3/ipu-di.c +++ b/drivers/gpu/ipu-v3/ipu-di.c @@ -172,7 +172,7 @@ static void ipu_di_sync_config(struct ipu_di *di, struct di_sync_config *config, (c->repeat_count >= 0x1000) || (c->cnt_up >= 0x400) || (c->cnt_down >= 0x400)) { - dev_err(di->ipu->dev, "DI%d counters out of range.\n", + dev_err(di->ipu->dev, "di%d counters out of range.\n", di->id); return; } @@ -459,8 +459,10 @@ static void ipu_di_config_clock(struct ipu_di *di, error = rate / (sig->pixelclock / 1000); - dev_dbg(di->ipu->dev, " IPU clock can give %lu with divider %u, error %d.%u%%\n", - rate, div, (signed)(error - 1000) / 10, error % 10); + dev_dbg(di->ipu->dev, + "di%d: IPU clock can give %lu with divider %u, error %d.%u%%\n", + di->id, rate, div, (signed)(error - 1000) / 10, + error % 10); /* Allow a 1% error */ if (error < 1010 && error >= 990) { @@ -503,7 +505,9 @@ static void ipu_di_config_clock(struct ipu_di *di, val |= DI_GEN_DI_CLK_EXT; ipu_di_write(di, val, DI_GENERAL); - dev_dbg(di->ipu->dev, "Want %luHz IPU %luHz DI %luHz using %s, %luHz\n", + dev_dbg(di->ipu->dev, + "di%d: Want %luHz IPU %luHz DI %luHz using %s, %luHz\n", + di->id, sig->pixelclock, clk_get_rate(di->clk_ipu), clk_get_rate(di->clk_di), @@ -528,10 +532,12 @@ static void adapt_panel_to_ipu_restricitions(struct ipu_di *di, sig->v_end_width = 2; sig->v_sync_width = sig->v_sync_width - diff; } else - dev_warn(di->ipu->dev, "failed to adapt timing\n"); + dev_warn(di->ipu->dev, + "di%d: failed to adapt timing\n", di->id); dev_warn(di->ipu->dev, - "timing adapted due to IPU restrictions\n"); + "di%d: timing adapted due to IPU restrictions\n", + di->id); } } @@ -541,7 +547,7 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) u32 di_gen, vsync_cnt; u32 div; - dev_dbg(di->ipu->dev, "disp %d: panel size = %d x %d\n", + dev_dbg(di->ipu->dev, "di%d: panel size = %d x %d\n", di->id, sig->width, sig->height); if ((sig->v_sync_width == 0) || (sig->h_sync_width == 0)) @@ -549,7 +555,9 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) adapt_panel_to_ipu_restricitions(di, sig); - dev_dbg(di->ipu->dev, "Clocks: IPU %luHz DI %luHz Needed %luHz\n", + dev_dbg(di->ipu->dev, + "di%d: Clocks: IPU %luHz DI %luHz Needed %luHz\n", + di->id, clk_get_rate(di->clk_ipu), clk_get_rate(di->clk_di), sig->pixelclock); @@ -762,8 +770,10 @@ int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id, ipu->di_priv[id] = di; di->clk_di = devm_clk_get(dev, id ? "di1" : "di0"); - if (IS_ERR(di->clk_di)) + if (IS_ERR(di->clk_di)) { + dev_err(dev, "di%d: could not get clock\n", id); return PTR_ERR(di->clk_di); + } di->ipu = ipu; di->module = module; @@ -775,7 +785,7 @@ int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id, ipu_di_write(di, 0x10, DI_BS_CLKGEN0); - dev_dbg(dev, "DI%d base: 0x%08lx remapped to %p\n", + dev_dbg(dev, "di%d: base: 0x%08lx remapped to %p\n", id, base, di->base); di->inuse = false;