From patchwork Fri Oct 31 22:54:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 5207711 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3BE90C11AC for ; Fri, 31 Oct 2014 23:57:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 31DE120173 for ; Fri, 31 Oct 2014 23:57:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 18BA320172 for ; Fri, 31 Oct 2014 23:57:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6781E6E87F; Fri, 31 Oct 2014 16:56:41 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pa0-f50.google.com (mail-pa0-f50.google.com [209.85.220.50]) by gabe.freedesktop.org (Postfix) with ESMTP id AA26C6E84D for ; Fri, 31 Oct 2014 15:57:15 -0700 (PDT) Received: by mail-pa0-f50.google.com with SMTP id eu11so8582837pac.37 for ; Fri, 31 Oct 2014 15:57:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sss1Qg5+6oKKcR3m1/A71GYxkWiNMhc0jtbZfyYH7y0=; b=q4n0+sHerxxyq0mVlW01WGowEaTvTNHFvIUmi439k+mYNBnS0NxjyORTaqagbWhGms kfIv20Ulnzq3Txh/c+soNboIYtsCtronNhJCFUzmXUHdM9f/FuRhR7ED5XQ8t/WLb5pE /UYdZoWXARvaRiqgsSFcF0h6KeKtB7iVZpRjUUCkIDYS9cy/PzYX0GM8c8d7tFm1TISO I/FzHsFLQwGBbSFM3dHLnkKf8ongiBY++ijGphhfTgdFS5vJvK9qn2uzSBvO8Xgnar5G Vi9x7PmusqaW0WhzA1ishiB2xd1pxZjwFzwMFgc2t77oMb5pm/mAWxt8cJb9v2k8edje KEnw== X-Received: by 10.70.45.40 with SMTP id j8mr27955837pdm.130.1414796235556; Fri, 31 Oct 2014 15:57:15 -0700 (PDT) Received: from mothership.mgc.mentorg.com (c-50-152-159-227.hsd1.ca.comcast.net. [50.152.159.227]) by mx.google.com with ESMTPSA id ev8sm10870656pdb.28.2014.10.31.15.57.14 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 31 Oct 2014 15:57:15 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: dri-devel@lists.freedesktop.org Subject: [PATCH 33/72] gpu: ipu-cpmem: Pass drm fourcc to ipu_cpmem_set_yuv_* Date: Fri, 31 Oct 2014 15:54:16 -0700 Message-Id: <1414796095-10107-34-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> References: <1414796095-10107-1-git-send-email-steve_longerbeam@mentor.com> X-Mailman-Approved-At: Fri, 31 Oct 2014 16:56:31 -0700 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Pass a drm pixel format fourcc to ipu_cpmem_set_yuv_interleaved(), ipu_cpmem_set_yuv_planar_full(), and ipu_cpmem_set_yuv_planar(), instead of a v4l2 pixel format. The remaining cpmem API that still accepts a v4l2 format is now only ipu_cpmem_set_image(), since this function is called by v4l2 drivers. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-cpmem.c | 83 +++++++++++++++++++++------------------- include/video/imx-ipu-v3.h | 6 +-- 2 files changed, 46 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 2c93e9c..a53b242 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -384,15 +384,15 @@ int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width) } EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_passthrough); -void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format) +void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 drm_fourcc) { - switch (pixel_format) { - case V4L2_PIX_FMT_UYVY: + switch (drm_fourcc) { + case DRM_FORMAT_UYVY: ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */ ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA);/* pix fmt */ ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */ break; - case V4L2_PIX_FMT_YUYV: + case DRM_FORMAT_YUYV: ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */ ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8);/* pix fmt */ ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */ @@ -402,23 +402,23 @@ void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format) EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_interleaved); void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch, - u32 pixel_format, int stride, + u32 drm_fourcc, int stride, int u_offset, int v_offset) { - switch (pixel_format) { - case V4L2_PIX_FMT_YUV420: - case V4L2_PIX_FMT_YUV422P: + switch (drm_fourcc) { + case DRM_FORMAT_YUV420: + case DRM_FORMAT_YUV422: ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, (stride / 2) - 1); ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8); ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8); break; - case V4L2_PIX_FMT_YVU420: + case DRM_FORMAT_YVU420: ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, (stride / 2) - 1); ipu_ch_param_write_field(ch, IPU_FIELD_UBO, v_offset / 8); ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8); break; - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV16: + case DRM_FORMAT_NV12: + case DRM_FORMAT_NV16: ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, stride - 1); ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8); ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8); @@ -427,32 +427,32 @@ void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch, } EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full); -void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch, - u32 pixel_format, int stride, int height) +void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch, u32 drm_fourcc, + int stride, int height) { int u_offset, v_offset; int uv_stride = 0; - switch (pixel_format) { - case V4L2_PIX_FMT_YUV420: - case V4L2_PIX_FMT_YVU420: + switch (drm_fourcc) { + case DRM_FORMAT_YUV420: + case DRM_FORMAT_YVU420: uv_stride = stride / 2; u_offset = stride * height; v_offset = u_offset + (uv_stride * height / 2); - ipu_cpmem_set_yuv_planar_full(ch, pixel_format, stride, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, stride, u_offset, v_offset); break; - case V4L2_PIX_FMT_YUV422P: + case DRM_FORMAT_YUV422: uv_stride = stride / 2; u_offset = stride * height; v_offset = u_offset + (uv_stride * height); - ipu_cpmem_set_yuv_planar_full(ch, pixel_format, stride, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, stride, u_offset, v_offset); break; - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV16: + case DRM_FORMAT_NV12: + case DRM_FORMAT_NV16: u_offset = stride * height; - ipu_cpmem_set_yuv_planar_full(ch, pixel_format, stride, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, stride, u_offset, 0); break; } @@ -600,73 +600,76 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image) { struct v4l2_pix_format *pix = &image->pix; int offset, u_offset, v_offset; + u32 drm_fourcc; pr_debug("%s: resolution: %dx%d stride: %d\n", __func__, pix->width, pix->height, pix->bytesperline); + drm_fourcc = v4l2_pix_fmt_to_drm_fourcc(pix->pixelformat); + ipu_cpmem_set_resolution(ch, image->rect.width, image->rect.height); ipu_cpmem_set_stride(ch, pix->bytesperline); - ipu_cpmem_set_fmt(ch, v4l2_pix_fmt_to_drm_fourcc(pix->pixelformat)); + ipu_cpmem_set_fmt(ch, drm_fourcc); - switch (pix->pixelformat) { - case V4L2_PIX_FMT_YUV420: - case V4L2_PIX_FMT_YVU420: + switch (drm_fourcc) { + case DRM_FORMAT_YUV420: + case DRM_FORMAT_YVU420: offset = Y_OFFSET(pix, image->rect.left, image->rect.top); u_offset = U_OFFSET(pix, image->rect.left, image->rect.top) - offset; v_offset = V_OFFSET(pix, image->rect.left, image->rect.top) - offset; - ipu_cpmem_set_yuv_planar_full(ch, pix->pixelformat, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, pix->bytesperline, u_offset, v_offset); break; - case V4L2_PIX_FMT_YUV422P: + case DRM_FORMAT_YUV422: offset = Y_OFFSET(pix, image->rect.left, image->rect.top); u_offset = U2_OFFSET(pix, image->rect.left, image->rect.top) - offset; v_offset = V2_OFFSET(pix, image->rect.left, image->rect.top) - offset; - ipu_cpmem_set_yuv_planar_full(ch, pix->pixelformat, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, pix->bytesperline, u_offset, v_offset); break; - case V4L2_PIX_FMT_NV12: + case DRM_FORMAT_NV12: offset = Y_OFFSET(pix, image->rect.left, image->rect.top); u_offset = UV_OFFSET(pix, image->rect.left, image->rect.top) - offset; v_offset = 0; - ipu_cpmem_set_yuv_planar_full(ch, pix->pixelformat, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, pix->bytesperline, u_offset, v_offset); break; - case V4L2_PIX_FMT_NV16: + case DRM_FORMAT_NV16: offset = Y_OFFSET(pix, image->rect.left, image->rect.top); u_offset = UV2_OFFSET(pix, image->rect.left, image->rect.top) - offset; v_offset = 0; - ipu_cpmem_set_yuv_planar_full(ch, pix->pixelformat, + ipu_cpmem_set_yuv_planar_full(ch, drm_fourcc, pix->bytesperline, u_offset, v_offset); break; - case V4L2_PIX_FMT_UYVY: - case V4L2_PIX_FMT_YUYV: - case V4L2_PIX_FMT_RGB565: + case DRM_FORMAT_UYVY: + case DRM_FORMAT_YUYV: + case DRM_FORMAT_RGB565: offset = image->rect.left * 2 + image->rect.top * pix->bytesperline; break; - case V4L2_PIX_FMT_RGB32: - case V4L2_PIX_FMT_BGR32: + case DRM_FORMAT_XBGR8888: + case DRM_FORMAT_XRGB8888: offset = image->rect.left * 4 + image->rect.top * pix->bytesperline; break; - case V4L2_PIX_FMT_RGB24: - case V4L2_PIX_FMT_BGR24: + case DRM_FORMAT_BGR888: + case DRM_FORMAT_RGB888: offset = image->rect.left * 3 + image->rect.top * pix->bytesperline; break; diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h index 7ff0d99..5aaa08d 100644 --- a/include/video/imx-ipu-v3.h +++ b/include/video/imx-ipu-v3.h @@ -205,12 +205,12 @@ void ipu_cpmem_set_rotation(struct ipuv3_channel *ch, int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch, const struct ipu_rgb *rgb); int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width); -void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format); +void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 drm_fourcc); void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch, - u32 pixel_format, int stride, + u32 drm_fourcc, int stride, int u_offset, int v_offset); void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch, - u32 pixel_format, int stride, int height); + u32 drm_fourcc, int stride, int height); int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc); int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image); void ipu_cpmem_dump(struct ipuv3_channel *ch);