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Wed, 10 Dec 2014 07:14:23 -0600 Received: from STOREXDAG04.amd.com (10.1.13.13) by satlexdag06.amd.com (10.181.40.13) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 10 Dec 2014 08:14:17 -0500 Received: from AMD (10.20.0.84) by storexdag04.amd.com (10.1.13.13) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 10 Dec 2014 08:14:16 -0500 From: Oded Gabbay To: Subject: [PATCH 2/3] drm/radeon: Add implementation of get_fw_version Date: Wed, 10 Dec 2014 15:13:46 +0200 Message-ID: <1418217227-10956-2-git-send-email-oded.gabbay@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1418217227-10956-1-git-send-email-oded.gabbay@amd.com> References: <1418217227-10956-1-git-send-email-oded.gabbay@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.20.0.84] X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.221; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(189002)(199003)(101416001)(46102003)(4396001)(19580405001)(19580395003)(47776003)(20776003)(50466002)(50226001)(62966003)(107046002)(77156002)(31966008)(21056001)(99396003)(450100001)(120916001)(77096005)(2351001)(106466001)(229853001)(36756003)(68736005)(110136001)(33646002)(105586002)(97736003)(86362001)(92566001)(76176999)(89996001)(64706001)(48376002)(84676001)(87936001)(50986999); DIR:OUT; SFP:1102; SCL:1; SRVR:BY2PR02MB202; H:atltwp01.amd.com; FPR:; SPF:None; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BY2PR02MB202; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601002); SRVR:BY2PR02MB202; X-Forefront-PRVS: 0421BF7135 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 165.204.84.221) smtp.mailfrom=Oded.Gabbay@amd.com; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BY2PR02MB202; X-OriginatorOrg: amd4.onmicrosoft.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alexey Skidanov This patch implements a new interface that was added to the kfd-->kgd interface. The new interface function retrieves the firmware version that is currently in use by the MEC engine. The firmware was uploaded to the MEC engine by the radeon driver. Signed-off-by: Alexey Skidanov Reviewed-by: Oded Gabbay --- drivers/gpu/drm/radeon/radeon_kfd.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c index 065d020..223c831 100644 --- a/drivers/gpu/drm/radeon/radeon_kfd.c +++ b/drivers/gpu/drm/radeon/radeon_kfd.c @@ -28,6 +28,8 @@ #include "cikd.h" #include "cik_reg.h" #include "radeon_kfd.h" +#include "radeon_ucode.h" +#include #define CIK_PIPE_PER_MEC (4) @@ -49,6 +51,7 @@ static uint64_t get_vmem_size(struct kgd_dev *kgd); static uint64_t get_gpu_clock_counter(struct kgd_dev *kgd); static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd); +static uint16_t get_fw_version(struct kgd_dev *kgd); /* * Register access functions @@ -91,6 +94,7 @@ static const struct kfd2kgd_calls kfd2kgd = { .hqd_load = kgd_hqd_load, .hqd_is_occupies = kgd_hqd_is_occupies, .hqd_destroy = kgd_hqd_destroy, + .get_fw_version = get_fw_version }; static const struct kgd2kfd_calls *kgd2kfd; @@ -561,3 +565,22 @@ static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type, release_queue(kgd); return 0; } + +static uint16_t get_fw_version(struct kgd_dev *kgd) +{ + struct radeon_device *rdev; + const struct gfx_firmware_header_v1_0 *hdr; + + BUG_ON(kgd == NULL); + + rdev = (struct radeon_device *) kgd; + + BUG_ON(rdev->mec_fw == NULL); + + hdr = (const struct gfx_firmware_header_v1_0 *)rdev->mec_fw->data; + + BUG_ON(hdr == NULL); + + /* Only 12 bit in use*/ + return hdr->header.ucode_version; +}