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[74.96.105.49]) by mx.google.com with ESMTPSA id 43sm18213707qgb.17.2015.01.13.09.47.14 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Jan 2015 09:47:14 -0800 (PST) From: Alex Deucher X-Google-Original-From: Alex Deucher To: dri-devel@lists.freedesktop.org Subject: [PATCH 23/24] radeon/audio: enable DP audio Date: Tue, 13 Jan 2015 12:46:52 -0500 Message-Id: <1421171213-23977-24-git-send-email-alexander.deucher@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1421171213-23977-1-git-send-email-alexander.deucher@amd.com> References: <1421171213-23977-1-git-send-email-alexander.deucher@amd.com> Cc: Alex Deucher , slava.grigorev@amd.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Slava Grigorev Signed-off-by: Slava Grigorev Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/atombios_encoders.c | 6 ++++ drivers/gpu/drm/radeon/dce6_afmt.c | 35 +++++++++++++++++++ drivers/gpu/drm/radeon/evergreen_hdmi.c | 54 ++++++++++++++++++++++++++++++ drivers/gpu/drm/radeon/evergreen_reg.h | 15 +++++++++ drivers/gpu/drm/radeon/radeon_audio.c | 37 ++++++++++++++++++++ 5 files changed, 147 insertions(+) diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index 8ca8b4f..7c9df1e 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c @@ -665,6 +665,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) int atombios_get_encoder_mode(struct drm_encoder *encoder) { + struct drm_device *dev = encoder->dev; + struct radeon_device *rdev = dev->dev_private; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_connector *connector; struct radeon_connector *radeon_connector; @@ -729,6 +731,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) dig_connector = radeon_connector->con_priv; if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { + if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) + return ATOM_ENCODER_MODE_DP_AUDIO; return ATOM_ENCODER_MODE_DP; } else if (radeon_audio != 0) { if (radeon_connector->audio == RADEON_AUDIO_ENABLE) @@ -743,6 +747,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) } break; case DRM_MODE_CONNECTOR_eDP: + if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) + return ATOM_ENCODER_MODE_DP_AUDIO; return ATOM_ENCODER_MODE_DP; case DRM_MODE_CONNECTOR_DVIA: case DRM_MODE_CONNECTOR_VGA: diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c index 1c87006..192c803 100644 --- a/drivers/gpu/drm/radeon/dce6_afmt.c +++ b/drivers/gpu/drm/radeon/dce6_afmt.c @@ -287,3 +287,38 @@ void dce6_dp_audio_set_dto(struct radeon_device *rdev, WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); WREG32(DCCG_AUDIO_DTO1_MODULE, clock); } + +void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable) +{ + struct drm_device *dev = encoder->dev; + struct radeon_device *rdev = dev->dev_private; + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); + struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; + uint32_t offset; + + if (!dig || !dig->afmt) + return; + + offset = dig->afmt->offset; + + if (enable) { + if (dig->afmt->enabled) + return; + + WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1)); + WREG32(EVERGREEN_DP_SEC_CNTL + offset, + EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */ + EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */ + EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */ + EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */ + radeon_audio_enable(rdev, dig->afmt->pin, true); + } else { + if (!dig->afmt->enabled) + return; + + WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0); + radeon_audio_enable(rdev, dig->afmt->pin, false); + } + + dig->afmt->enabled = enable; +} diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c index 0d8c85f..f0c59ab 100644 --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c @@ -424,3 +424,57 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable) DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n", enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id); } + +void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable) +{ + struct drm_device *dev = encoder->dev; + struct radeon_device *rdev = dev->dev_private; + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); + struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; + uint32_t offset; + + if (!dig || !dig->afmt) + return; + + offset = dig->afmt->offset; + + if (enable) { + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); + struct radeon_connector *radeon_connector = to_radeon_connector(connector); + struct radeon_connector_atom_dig *dig_connector; + uint32_t val; + + if (dig->afmt->enabled) + return; + + WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1)); + + if (radeon_connector->con_priv) { + dig_connector = radeon_connector->con_priv; + val = RREG32(EVERGREEN_DP_SEC_AUD_N + offset); + val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf); + + if (dig_connector->dp_clock == 162000) + val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(3); + else + val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(5); + + WREG32(EVERGREEN_DP_SEC_AUD_N + offset, val); + } + + WREG32(EVERGREEN_DP_SEC_CNTL + offset, + EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */ + EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */ + EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */ + EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */ + radeon_audio_enable(rdev, dig->afmt->pin, 0xf); + } else { + if (!dig->afmt->enabled) + return; + + WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0); + radeon_audio_enable(rdev, dig->afmt->pin, 0); + } + + dig->afmt->enabled = enable; +} diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index 23bff59..aa939dfe 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h @@ -251,4 +251,19 @@ /* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */ #define EVERGREEN_HDMI_BASE 0x7030 +/* Display Port block */ +#define EVERGREEN_DP_SEC_CNTL 0x7280 +# define EVERGREEN_DP_SEC_STREAM_ENABLE (1 << 0) +# define EVERGREEN_DP_SEC_ASP_ENABLE (1 << 4) +# define EVERGREEN_DP_SEC_ATP_ENABLE (1 << 8) +# define EVERGREEN_DP_SEC_AIP_ENABLE (1 << 12) +# define EVERGREEN_DP_SEC_GSP_ENABLE (1 << 20) +# define EVERGREEN_DP_SEC_AVI_ENABLE (1 << 24) +# define EVERGREEN_DP_SEC_MPG_ENABLE (1 << 28) +#define EVERGREEN_DP_SEC_TIMESTAMP 0x72a4 +# define EVERGREEN_DP_SEC_TIMESTAMP_MODE(x) (((x) & 0x3) << 0) +#define EVERGREEN_DP_SEC_AUD_N 0x7294 +# define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24) +# define EVERGREEN_DP_SEC_SS_EN (1 << 28) + #endif diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c index fc7a975..b77a8d6 100644 --- a/drivers/gpu/drm/radeon/radeon_audio.c +++ b/drivers/gpu/drm/radeon/radeon_audio.c @@ -97,8 +97,12 @@ void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode); +static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, + struct drm_display_mode *mode); void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); +void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable); +void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable); static const u32 pin_offsets[7] = { @@ -178,6 +182,7 @@ static struct radeon_audio_funcs dce32_dp_funcs = { .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, .set_dto = dce3_2_audio_set_dto, .set_avi_packet = r600_set_avi_packet, + .set_audio_packet = dce3_2_set_audio_packet, }; static struct radeon_audio_funcs dce4_hdmi_funcs = { @@ -203,6 +208,9 @@ static struct radeon_audio_funcs dce4_dp_funcs = { .write_latency_fields = dce4_afmt_write_latency_fields, .set_dto = dce4_dp_audio_set_dto, .set_avi_packet = evergreen_set_avi_packet, + .set_audio_packet = dce4_set_audio_packet, + .mode_set = radeon_audio_dp_mode_set, + .dpms = evergreen_enable_dp_audio_packets, }; static struct radeon_audio_funcs dce6_hdmi_funcs = { @@ -229,6 +237,9 @@ static struct radeon_audio_funcs dce6_dp_funcs = { .write_latency_fields = dce6_afmt_write_latency_fields, .set_dto = dce6_dp_audio_set_dto, .set_avi_packet = evergreen_set_avi_packet, + .set_audio_packet = dce4_set_audio_packet, + .mode_set = radeon_audio_dp_mode_set, + .dpms = dce6_enable_dp_audio_packets, }; static void radeon_audio_interface_init(struct radeon_device *rdev) @@ -710,6 +721,32 @@ static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, radeon_audio_enable(rdev, dig->afmt->pin, 0xf); } +static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, + struct drm_display_mode *mode) +{ + struct drm_device *dev = encoder->dev; + struct radeon_device *rdev = dev->dev_private; + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); + struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; + + if (!dig || !dig->afmt) + return; + + /* disable audio prior to setting up hw */ + dig->afmt->pin = radeon_audio_get_pin(encoder); + radeon_audio_enable(rdev, dig->afmt->pin, 0); + + radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10); + radeon_audio_set_audio_packet(encoder); + radeon_audio_select_pin(encoder); + + if (radeon_audio_set_avi_packet(encoder, mode) < 0) + return; + + /* enable audio after to setting up hw */ + radeon_audio_enable(rdev, dig->afmt->pin, 0xf); +} + void radeon_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) {