From patchwork Tue Jan 20 10:48:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 5667511 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 14E889F2ED for ; Tue, 20 Jan 2015 10:49:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 17FDE2035B for ; Tue, 20 Jan 2015 10:49:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 16F3C2037D for ; Tue, 20 Jan 2015 10:49:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0FEF56E612; Tue, 20 Jan 2015 02:49:10 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wi0-f172.google.com (mail-wi0-f172.google.com [209.85.212.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B9206E610 for ; Tue, 20 Jan 2015 02:49:08 -0800 (PST) Received: by mail-wi0-f172.google.com with SMTP id bs8so23844701wib.5 for ; Tue, 20 Jan 2015 02:49:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lo2LRCbIt+Vt3TexpnH0yeAMwXQQvSrigfU7vhs1WC4=; b=CzI3W34oyQQ2NtEH45+qnVNBf2X9xhWGada3LCfCU3SfFJM+SJ2L85ZutOgBHkQOmx WaECD5kqTaQHcr5+dZ0EPmnP4m5xLn+fx8hEXswwfGFSIK0Cr3HsrbO2xrABPFJI39mh Qt0+BAXZ5dmoLmGz4xgNX+iQAXpia66pXUU5pBgsUOJ+yAQuP05aVBByxhIz4i3WOhDb jmLoKJ4ZOpdKayenvHZscSdaXLkSQzU2mfslUCDw2KSHJiJL4r9Lca7UaDLWnS+/a88m ld66TPmRW0mOR5K3sdbiLT/dqeWwCDvOEaxY5FPQu2Sx37Ad6zxsoRelICOGYRQobq/x qm7g== X-Received: by 10.180.207.66 with SMTP id lu2mr45309061wic.13.1421750947758; Tue, 20 Jan 2015 02:49:07 -0800 (PST) Received: from localhost (port-56157.pppoe.wtnet.de. [46.59.220.18]) by mx.google.com with ESMTPSA id gz7sm2485568wib.22.2015.01.20.02.49.06 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jan 2015 02:49:07 -0800 (PST) From: Thierry Reding To: dri-devel@lists.freedesktop.org Subject: [PATCH 06/36] drm/tegra: Use tegra_commit_dc() in output drivers Date: Tue, 20 Jan 2015 11:48:25 +0100 Message-Id: <1421750935-4023-7-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1421750935-4023-1-git-send-email-thierry.reding@gmail.com> References: <1421750935-4023-1-git-send-email-thierry.reding@gmail.com> Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding All output drivers have open-coded variants of this function, so export it to remove some code duplication. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/dc.c | 2 +- drivers/gpu/drm/tegra/drm.h | 1 + drivers/gpu/drm/tegra/dsi.c | 6 ++---- drivers/gpu/drm/tegra/hdmi.c | 6 ++---- drivers/gpu/drm/tegra/rgb.c | 8 +++----- drivers/gpu/drm/tegra/sor.c | 6 ++---- 6 files changed, 11 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 8f64d8fdf967..6450f1a308cf 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -72,7 +72,7 @@ static void tegra_dc_cursor_commit(struct tegra_dc *dc) * into the ACTIVE copy, either immediately if the display controller is in * STOP mode, or at the next frame boundary otherwise. */ -static void tegra_dc_commit(struct tegra_dc *dc) +void tegra_dc_commit(struct tegra_dc *dc) { tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h index 3a3b2e7b5b3f..5a0e96debcb1 100644 --- a/drivers/gpu/drm/tegra/drm.h +++ b/drivers/gpu/drm/tegra/drm.h @@ -177,6 +177,7 @@ struct tegra_dc_window { void tegra_dc_enable_vblank(struct tegra_dc *dc); void tegra_dc_disable_vblank(struct tegra_dc *dc); void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file); +void tegra_dc_commit(struct tegra_dc *dc); struct tegra_output_ops { int (*enable)(struct tegra_output *output); diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c index c5a14eea5e55..6554eac858b7 100644 --- a/drivers/gpu/drm/tegra/dsi.c +++ b/drivers/gpu/drm/tegra/dsi.c @@ -658,8 +658,7 @@ static int tegra_output_dsi_enable(struct tegra_output *output) PW4_ENABLE | PM0_ENABLE | PM1_ENABLE; tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(dc); /* enable DSI controller */ tegra_dsi_enable(dsi); @@ -778,8 +777,7 @@ static int tegra_output_dsi_disable(struct tegra_output *output) value &= ~DSI_ENABLE; tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); - tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(dc); } err = tegra_dsi_wait_idle(dsi, 100); diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c index 0f122eae7c64..f118b914293e 100644 --- a/drivers/gpu/drm/tegra/hdmi.c +++ b/drivers/gpu/drm/tegra/hdmi.c @@ -997,8 +997,7 @@ static int tegra_output_hdmi_enable(struct tegra_output *output) PW4_ENABLE | PM0_ENABLE | PM1_ENABLE; tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(dc); /* TODO: add HDCP support */ @@ -1042,8 +1041,7 @@ static int tegra_output_hdmi_disable(struct tegra_output *output) value &= ~HDMI_ENABLE; tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); - tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(dc); } clk_disable_unprepare(hdmi->clk); diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c index d6af9be48f42..3b851abbccae 100644 --- a/drivers/gpu/drm/tegra/rgb.c +++ b/drivers/gpu/drm/tegra/rgb.c @@ -123,8 +123,7 @@ static int tegra_output_rgb_enable(struct tegra_output *output) PW4_ENABLE | PM0_ENABLE | PM1_ENABLE; tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_POWER_CONTROL); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(rgb->dc); rgb->enabled = true; @@ -148,11 +147,10 @@ static int tegra_output_rgb_disable(struct tegra_output *output) value &= ~DISP_CTRL_MODE_MASK; tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_COMMAND); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); - tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); + tegra_dc_commit(rgb->dc); + rgb->enabled = false; return 0; diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index 7829e81f065d..6a341822abe9 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -267,8 +267,7 @@ static int tegra_sor_wakeup(struct tegra_sor *sor) PW4_ENABLE | PM0_ENABLE | PM1_ENABLE; tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(dc); timeout = jiffies + msecs_to_jiffies(250); @@ -1080,8 +1079,7 @@ static int tegra_output_sor_disable(struct tegra_output *output) value &= ~SOR_ENABLE; tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); - tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(dc); } err = tegra_sor_power_down(sor);