From patchwork Tue Mar 17 15:59:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 6032701 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 58D299F314 for ; Tue, 17 Mar 2015 15:59:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 905E7203F4 for ; Tue, 17 Mar 2015 15:59:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3BFF82041B for ; Tue, 17 Mar 2015 15:59:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D1FB6E6AC; Tue, 17 Mar 2015 08:59:23 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qc0-f179.google.com (mail-qc0-f179.google.com [209.85.216.179]) by gabe.freedesktop.org (Postfix) with ESMTP id 7C6576E6AC for ; Tue, 17 Mar 2015 08:59:22 -0700 (PDT) Received: by qcto4 with SMTP id o4so12534405qct.3 for ; Tue, 17 Mar 2015 08:59:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=Caht7t6G/OLtUBK9e/CLVgyKYFMdvd40KMkC/mskg1U=; b=aNKKCbi+xENuQ7obVvM8EjtM7ajrHFpk1HhNoeSnTD5atIbXA67nZC4VVI3kSQ49WC trrC/yDbnCnYPcpv6e359JBbjY/4CrtFNobiS9g/wTMVI0jMHyRQjE9b7U26me3daaXf rxMP2xsmI8pP7jid7vWAAQ+mgjF0D6R7Kcdx1sIhWglieKqhINpaKrUJJRFVVIRhcY2L P/HJngXO8qa55FesIOV/Ow2dMSfAJ/IoP54e0pD1P9jLAB3UHjnKJ93cYdKE7vLrkRj/ dwW4huJOHLOiJJutV4ioWolgDUHF81iao6lsc/TLra1Zalf35tNlpWrLzU/iWPQgnf0B CjYA== X-Received: by 10.140.144.147 with SMTP id 141mr84400605qhq.91.1426607962004; Tue, 17 Mar 2015 08:59:22 -0700 (PDT) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by mx.google.com with ESMTPSA id z67sm9917594qgz.10.2015.03.17.08.59.21 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Mar 2015 08:59:21 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/radeon: drop ttm two ended allocation Date: Tue, 17 Mar 2015 11:59:15 -0400 Message-Id: <1426607955-2397-1-git-send-email-alexander.deucher@amd.com> X-Mailer: git-send-email 1.8.3.1 Cc: Alex Deucher , stable@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP radeon_bo_create() calls radeon_ttm_placement_from_domain() before ttm_bo_init() is called. radeon_ttm_placement_from_domain() uses the ttm bo size to determine when to select top down allocation but since the ttm bo is not initialized yet the check is always false. It only took affect when buffers were validated later. It also seemed to regress suspend and resume on some systems possibly due to it not taking affect in radeon_bo_create(). radeon_bo_create() and radeon_ttm_placement_from_domain() need to be reworked substantially for this to be optimally effective. Re-enable it at that point. Noticed-by: Oded Gabbay Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Christian König --- drivers/gpu/drm/radeon/radeon_object.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 43e0994..318165d 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -173,17 +173,6 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) else rbo->placements[i].lpfn = 0; } - - /* - * Use two-ended allocation depending on the buffer size to - * improve fragmentation quality. - * 512kb was measured as the most optimal number. - */ - if (rbo->tbo.mem.size > 512 * 1024) { - for (i = 0; i < c; i++) { - rbo->placements[i].flags |= TTM_PL_FLAG_TOPDOWN; - } - } } int radeon_bo_create(struct radeon_device *rdev,