From patchwork Tue Apr 7 06:59:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joonyoung Shim X-Patchwork-Id: 6167461 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 892D2BF4A6 for ; Tue, 7 Apr 2015 06:59:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 917E02034B for ; Tue, 7 Apr 2015 06:59:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 50EEB202E5 for ; Tue, 7 Apr 2015 06:59:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ECA736E3C8; Mon, 6 Apr 2015 23:59:31 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E0776E1E3 for ; Mon, 6 Apr 2015 23:59:30 -0700 (PDT) Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NMF00IPACR4VK50@mailout2.samsung.com> for dri-devel@lists.freedesktop.org; Tue, 07 Apr 2015 15:59:28 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.112]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 51.A8.18889.05083255; Tue, 7 Apr 2015 15:59:28 +0900 (KST) X-AuditID: cbfee68d-f79266d0000049c9-ac-552380507848 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 77.B8.25346.05083255; Tue, 7 Apr 2015 15:59:28 +0900 (KST) Received: from localhost.localdomain ([10.252.81.123]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NMF003D5CR3YW80@mmp2.samsung.com>; Tue, 07 Apr 2015 15:59:27 +0900 (KST) From: Joonyoung Shim To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/2] drm/exynos: add ratio calculation Date: Tue, 07 Apr 2015 15:59:39 +0900 Message-id: <1428389979-13514-2-git-send-email-jy0922.shim@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1428389979-13514-1-git-send-email-jy0922.shim@samsung.com> References: <1428389979-13514-1-git-send-email-jy0922.shim@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrGLMWRmVeSWpSXmKPExsWyRsSkQDegQTnU4NwuPosrX9+zWUy6P4HF 4sW9iywWMya/ZLNoW/2B1YHV4373cSaPf8fYPfq2rGIMYI7isklJzcksSy3St0vgytj4XrVg jUzF6Ssf2RoYX4h3MXJySAiYSNx6288EYYtJXLi3nq2LkYtDSGApo8TXswsZYYo2t0xkgUhM Z5SY23acGcL5wSgx6eMydpAqNgE9iTvbjoONEhFQlvg7cRVYN7NAlsT9ecfAaoQFzCR+PLsD VsMioCqx+fMLVhCbV8Bd4s36F+wQ2+QkTh6bDBTn4OAU8JD49CcfJCwEVHLtVycryF4Jgd9s Ete+3WWFmCMg8W3yIRaQegkBWYlNB5ghxkhKHFxxg2UCo/ACRoZVjKKpBckFxUnpRYZ6xYm5 xaV56XrJ+bmbGIHBe/rfs94djLcPWB9iFOBgVOLhZZBTDhViTSwrrsw9xGgKtGEis5Rocj4w RvJK4g2NzYwsTE1MjY3MLc2UxHkVpX4GCwmkJ5akZqemFqQWxReV5qQWH2Jk4uCUamB8oB78 Op097jHX46qzHxmfhD7gu6+camIfH1U75XWFT8BNk9ZsX47qo6rdZurzT9Q3hU7b0nG6ofHr SYn6+wmzTm30Kohhilru/2SO88FzITaLPxvF1gWuZvj566PC9zUrQ7IvLN+V6h1pIyJnEWXa vPD4kVqb2ZNFKpJymwr0cxSPszrNT1RiKc5INNRiLipOBABRSKdhWQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t9jQd2ABuVQgyfnOSyufH3PZjHp/gQW ixf3LrJYzJj8ks2ibfUHVgdWj/vdx5k8/h1j9+jbsooxgDmqgdEmIzUxJbVIITUvOT8lMy/d Vsk7ON453tTMwFDX0NLCXEkhLzE31VbJxSdA1y0zB2inkkJZYk4pUCggsbhYSd8O04TQEDdd C5jGCF3fkCC4HiMDNJCwhjFj43vVgjUyFaevfGRrYHwh3sXIySEhYCKxuWUiC4QtJnHh3nq2 LkYuDiGB6YwSc9uOM0M4PxglJn1cxg5SxSagJ3Fn23EmEFtEQFni78RVjCA2s0CWxP15x8Bq hAXMJH48uwNWwyKgKrH58wtWEJtXwF3izfoX7BDb5CROHpsMFOfg4BTwkPj0Jx8kLARUcu1X J+sERt4FjAyrGEVTC5ILipPScw31ihNzi0vz0vWS83M3MYJj45nUDsaVDRaHGAU4GJV4eBnk lEOFWBPLiitzDzFKcDArifBy5wKFeFMSK6tSi/Lji0pzUosPMZoCHTWRWUo0OR8Yt3kl8YbG JmZGlkbmhhZGxuZK4rxzdOVChQTSE0tSs1NTC1KLYPqYODilGhjTk0rMlWceW8W83+ZR8YVV R9udDh0512oumNFynrXa4dOy40xbZgiwi019+G/ei/qrF1jC94lrx671UObU3yW/ae6xq1p6 OSGXzqxPELv3aVFBknK1d0C/Veq0r/ELk4VXK3mb5rKzqMwTmK65gyn62eyX/ZesfbfNL6ss nfj93Krm1c3f3ixXYinOSDTUYi4qTgQAXeRfoKMCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: tjakobi@math.uni-bielefeld.de, sw0312.kim@samsung.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Calculation ratio from exynos_drm plane codes, then each hw drivers can use it without extra operation. Also this fixes width and height of source used for actual crtc shown via screen. Signed-off-by: Joonyoung Shim --- drivers/gpu/drm/exynos/exynos_drm_drv.h | 4 ++++ drivers/gpu/drm/exynos/exynos_drm_plane.c | 8 ++++++-- drivers/gpu/drm/exynos/exynos_mixer.c | 9 ++------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index f576719..33ae657 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -61,6 +61,8 @@ enum exynos_drm_output_type { * @crtc_height: window height to be displayed (hardware screen). * @mode_width: width of screen mode. * @mode_height: height of screen mode. + * @h_ratio: horizontal scaling ratio, 16.16 fixed point + * @v_ratio: vertical scaling ratio, 16.16 fixed point * @refresh: refresh rate. * @scan_flag: interlace or progressive way. * (it could be DRM_MODE_FLAG_*) @@ -97,6 +99,8 @@ struct exynos_drm_plane { unsigned int crtc_height; unsigned int mode_width; unsigned int mode_height; + unsigned int h_ratio; + unsigned int v_ratio; unsigned int refresh; unsigned int scan_flag; unsigned int bpp; diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index 1e875f4..8bad40e 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -88,11 +88,15 @@ static void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc crtc_y = 0; } + /* set ratio */ + exynos_plane->h_ratio = (src_w << 16) / crtc_w; + exynos_plane->v_ratio = (src_h << 16) / crtc_h; + /* set drm framebuffer data. */ exynos_plane->src_x = src_x; exynos_plane->src_y = src_y; - exynos_plane->src_width = src_w; - exynos_plane->src_height = src_h; + exynos_plane->src_width = (actual_w * exynos_plane->h_ratio) >> 16; + exynos_plane->src_height = (actual_h * exynos_plane->v_ratio) >> 16; exynos_plane->fb_width = fb->width; exynos_plane->fb_height = fb->height; exynos_plane->bpp = fb->bits_per_pixel; diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index ede402b..fbec750 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -382,7 +382,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) struct mixer_resources *res = &ctx->mixer_res; unsigned long flags; struct exynos_drm_plane *plane; - unsigned int x_ratio, y_ratio; unsigned int buf_num = 1; dma_addr_t luma_addr[2], chroma_addr[2]; bool tiled_mode = false; @@ -407,10 +406,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) return; } - /* scaling feature: (src << 16) / dst */ - x_ratio = (plane->src_width << 16) / plane->crtc_width; - y_ratio = (plane->src_height << 16) / plane->crtc_height; - if (buf_num == 2) { luma_addr[0] = plane->dma_addr[0]; chroma_addr[0] = plane->dma_addr[1]; @@ -470,8 +465,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) vp_reg_write(res, VP_DST_V_POSITION, plane->crtc_y); } - vp_reg_write(res, VP_H_RATIO, x_ratio); - vp_reg_write(res, VP_V_RATIO, y_ratio); + vp_reg_write(res, VP_H_RATIO, plane->h_ratio); + vp_reg_write(res, VP_V_RATIO, plane->v_ratio); vp_reg_write(res, VP_ENDIAN_MODE, VP_ENDIAN_MODE_LITTLE);