From patchwork Wed Apr 15 15:01:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tobias Jakobi X-Patchwork-Id: 6221241 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8BDA4BF4A6 for ; Wed, 15 Apr 2015 15:03:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8B30520274 for ; Wed, 15 Apr 2015 15:03:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 292622025A for ; Wed, 15 Apr 2015 15:03:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 85C357211B; Wed, 15 Apr 2015 08:03:22 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.math.uni-bielefeld.de (smtp.math.uni-bielefeld.de [129.70.45.10]) by gabe.freedesktop.org (Postfix) with ESMTP id BC4C07211B for ; Wed, 15 Apr 2015 08:03:20 -0700 (PDT) Received: from chidori.math.uni-bielefeld.de (dhcp24-141.math.uni-bielefeld.de [129.70.24.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (Client did not present a certificate) by smtp.math.uni-bielefeld.de (Postfix) with ESMTPSA id D3E3F601A6; Wed, 15 Apr 2015 17:03:19 +0200 (CEST) From: Tobias Jakobi To: linux-samsung-soc@vger.kernel.org Subject: [RFC 4/6] drm/exynos: remove global pixel format list Date: Wed, 15 Apr 2015 17:01:58 +0200 Message-Id: <1429110120-7043-5-git-send-email-tjakobi@math.uni-bielefeld.de> X-Mailer: git-send-email 2.0.5 In-Reply-To: <1429110120-7043-1-git-send-email-tjakobi@math.uni-bielefeld.de> References: <1429110120-7043-1-git-send-email-tjakobi@math.uni-bielefeld.de> Cc: Tobias Jakobi , dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the pixel formats that are supported by a plane object are hard-coded to three entries. This is not correct since depending on the particular hardware block (DECON7, FIMD, VP, etc.) the supported formats are different. Let each block specify its own list of formats. Signed-off-by: Tobias Jakobi --- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 7 +++++++ drivers/gpu/drm/exynos/exynos_drm_fimd.c | 7 +++++++ drivers/gpu/drm/exynos/exynos_drm_plane.c | 10 ++-------- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 7 +++++++ drivers/gpu/drm/exynos/exynos_mixer.c | 18 ++++++++++++++++++ 5 files changed, 41 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c index ca70599..73788a1 100644 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c @@ -42,6 +42,11 @@ #define WINDOWS_NR 2 +static const uint32_t decon_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + struct decon_context { struct device *dev; struct drm_device *drm_dev; @@ -767,6 +772,8 @@ static int decon_bind(struct device *dev, struct device *master, void *data) } plane_config.possible_crtcs = 1 << ctx->pipe; + plane_config.pixel_formats = decon_formats; + plane_config.num_pixel_formats = ARRAY_SIZE(decon_formats); for (i = 0; i < WINDOWS_NR; i++) { plane_config.type = (i == ctx->default_win) ? diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 93fbaa5..1db8db7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -144,6 +144,11 @@ static struct fimd_driver_data exynos5_fimd_driver_data = { .has_vtsel = 1, }; +static const uint32_t fimd_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + struct fimd_context { struct device *dev; struct drm_device *drm_dev; @@ -1005,6 +1010,8 @@ static int fimd_bind(struct device *dev, struct device *master, void *data) ctx->pipe = priv->pipe++; plane_config.possible_crtcs = 1 << ctx->pipe; + plane_config.pixel_formats = fimd_formats; + plane_config.num_pixel_formats = ARRAY_SIZE(fimd_formats); for (i = 0; i < WINDOWS_NR; i++) { plane_config.type = (i == ctx->default_win) ? diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index d24b32a..563d471 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -19,12 +19,6 @@ #include "exynos_drm_gem.h" #include "exynos_drm_plane.h" -static const uint32_t formats[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_NV12, -}; - /* * This function is to get X or Y size shown via screen. This needs length and * start position of CRTC. @@ -212,8 +206,8 @@ int exynos_plane_init(struct drm_device *dev, err = drm_universal_plane_init(dev, &exynos_plane->base, config->possible_crtcs, - &exynos_plane_funcs, formats, - ARRAY_SIZE(formats), config->type); + &exynos_plane_funcs, config->pixel_formats, + config->num_pixel_formats, config->type); if (err) { DRM_ERROR("failed to initialize plane\n"); return err; diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index ca7cc8a..94d2e84 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c @@ -33,6 +33,11 @@ #define ctx_from_connector(c) container_of(c, struct vidi_context, \ connector) +static const uint32_t vidi_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + struct vidi_context { struct exynos_drm_display display; struct platform_device *pdev; @@ -470,6 +475,8 @@ static int vidi_bind(struct device *dev, struct device *master, void *data) vidi_ctx_initialize(ctx, drm_dev); plane_config.possible_crtcs = 1 << ctx->pipe; + plane_config.pixel_formats = vidi_formats; + plane_config.num_pixel_formats = ARRAY_SIZE(vidi_formats); for (i = 0; i < WINDOWS_NR; i++) { plane_config.type = (i == ctx->default_win) ? diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 207d5c9..50df981 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -43,6 +43,7 @@ #define MIXER_WIN_NR 3 #define MIXER_DEFAULT_WIN 0 +#define MIXER_VP_WIN 2 #define MIXER_PIXELFORMAT_RGB565 4 #define MIXER_PIXELFORMAT_ARGB1555 5 @@ -123,6 +124,15 @@ static const u8 filter_cr_horiz_tap4[] = { 70, 59, 48, 37, 27, 19, 11, 5, }; +static const uint32_t mixer_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + +static const uint32_t vp_formats[] = { + DRM_FORMAT_NV12, +}; + static inline u32 vp_reg_read(struct mixer_resources *res, u32 reg_id) { return readl(res->vp_regs + reg_id); @@ -1240,6 +1250,14 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data) DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; plane_config.zpos = i; + if (i == MIXER_VP_WIN && ctx->vp_enabled) { + plane_config.pixel_formats = vp_formats; + plane_config.num_pixel_formats = ARRAY_SIZE(vp_formats); + } else { + plane_config.pixel_formats = mixer_formats; + plane_config.num_pixel_formats = ARRAY_SIZE(mixer_formats); + } + ret = exynos_plane_init(drm_dev, &ctx->planes[i], &plane_config); if (ret) return ret;