From patchwork Mon May 11 10:55:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 6375801 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4B34ABEEE1 for ; Mon, 11 May 2015 10:55:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 59FE6202DD for ; Mon, 11 May 2015 10:55:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 380C72021B for ; Mon, 11 May 2015 10:55:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 77C896E27F; Mon, 11 May 2015 03:55:54 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pa0-f41.google.com (mail-pa0-f41.google.com [209.85.220.41]) by gabe.freedesktop.org (Postfix) with ESMTP id 5BECC6E27F for ; Mon, 11 May 2015 03:55:53 -0700 (PDT) Received: by pacyx8 with SMTP id yx8so107247390pac.1 for ; Mon, 11 May 2015 03:55:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=6vM1HdSlMj5ZApqtTxitaCyF1LOLjbV04do1Ho6LH60=; b=F75wjVCAvCf5+VdzEJfROpTNFWg9XYD9ONGI/JU9+pDqY2nK2kgckAjp5RAjcvggS+ C9r3+ZMNZF3CY9wwbOmiXGA3fEdsz+z2NcsYk4QdZQXrcAjhkzBdzuMzc1y+XUDdaWZ2 OMyPAgfwbuEQX6663St8rS/GFlib0dLp4q08k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=6vM1HdSlMj5ZApqtTxitaCyF1LOLjbV04do1Ho6LH60=; b=eMEHNOzZwLA6/YfkC3y4Mt2GmmowmB5CO4R5l8Mq3o3mP84wgwtnc6UjgxCQwtLi/5 rTP4Xz4MKxJGTCxEQO8kZzKELDxa/0iaBG7mYht3DtbLuzzVVGmMHAARTWKknHrUjLnT CQ+u3l5i1jtL7t1X7qUaUyro/cTKFPvmBhghoKjkoeWXmodjxJXgfDqwlbYgWsNmH0RB DcylqV7Zd4289H8xgYusbctHVr61fjhINHiNQpBPWG4za1k8T6gl5qioDqk80cIFlji+ eos8TUL1VHS4YmPPyrnH0pzF/iCaTcLWkNMiAFGdnQ13LvQ95FrdlxKauMubKX4bR0LV /fHg== X-Gm-Message-State: ALoCoQkLXkpLgeAD2uCUOXVQ3rVYi3DnZOEX+LdpoU8QPtZWLXP1xWTkwVdKrctC0PiaoN2PZIbO X-Received: by 10.68.197.39 with SMTP id ir7mr17960922pbc.87.1431341753107; Mon, 11 May 2015 03:55:53 -0700 (PDT) Received: from basement.tok.corp.google.com ([172.23.69.229]) by mx.google.com with ESMTPSA id zt9sm12778533pac.9.2015.05.11.03.55.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 11 May 2015 03:55:52 -0700 (PDT) From: Tomasz Figa To: dri-devel@lists.freedesktop.org Subject: [PATCH v2] drm/rockchip: Add BGR formats to VOP Date: Mon, 11 May 2015 19:55:39 +0900 Message-Id: <1431341739-12523-1-git-send-email-tfiga@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c Cc: linux-kernel@vger.kernel.org, Tomasz Figa , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP VOP can support BGR formats in all windows thanks to red/blue swap option provided in WINx_CTRL0 registers. This patch enables support for ABGR8888, XBGR8888, BGR888 and BGR565 formats by using this feature. Signed-off-by: Tomasz Figa --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33 +++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) Changes since v1: (https://patchwork.kernel.org/patch/6369531/) - Fixed register addresses for win2/3 and hwc (reported by Mark Yao). diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 4557f33..6254e98 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -169,6 +169,7 @@ struct vop_win_phy { struct vop_reg enable; struct vop_reg format; + struct vop_reg rb_swap; struct vop_reg act_info; struct vop_reg dsp_info; struct vop_reg dsp_st; @@ -198,8 +199,12 @@ struct vop_data { static const uint32_t formats_01[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ABGR8888, DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, DRM_FORMAT_NV12, DRM_FORMAT_NV16, DRM_FORMAT_NV24, @@ -208,8 +213,12 @@ static const uint32_t formats_01[] = { static const uint32_t formats_234[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ABGR8888, DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, }; static const struct vop_win_phy win01_data = { @@ -217,6 +226,7 @@ static const struct vop_win_phy win01_data = { .nformats = ARRAY_SIZE(formats_01), .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), .format = VOP_REG(WIN0_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(WIN0_CTRL0, 0x1, 12), .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), @@ -233,6 +243,7 @@ static const struct vop_win_phy win23_data = { .nformats = ARRAY_SIZE(formats_234), .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), .format = VOP_REG(WIN2_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(WIN2_CTRL0, 0x1, 12), .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), @@ -246,6 +257,7 @@ static const struct vop_win_phy cursor_data = { .nformats = ARRAY_SIZE(formats_234), .enable = VOP_REG(HWC_CTRL0, 0x1, 0), .format = VOP_REG(HWC_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(HWC_CTRL0, 0x1, 12), .dsp_st = VOP_REG(HWC_DSP_ST, 0x1fff1fff, 0), .yrgb_mst = VOP_REG(HWC_MST, 0xffffffff, 0), }; @@ -351,15 +363,32 @@ static inline void vop_mask_write_relaxed(struct vop *vop, uint32_t offset, } } +static bool has_rb_swapped(uint32_t format) +{ + switch (format) { + case DRM_FORMAT_XBGR8888: + case DRM_FORMAT_ABGR8888: + case DRM_FORMAT_BGR888: + case DRM_FORMAT_BGR565: + return true; + default: + return false; + } +} + static enum vop_data_format vop_convert_format(uint32_t format) { switch (format) { case DRM_FORMAT_XRGB8888: case DRM_FORMAT_ARGB8888: + case DRM_FORMAT_XBGR8888: + case DRM_FORMAT_ABGR8888: return VOP_FMT_ARGB8888; case DRM_FORMAT_RGB888: + case DRM_FORMAT_BGR888: return VOP_FMT_RGB888; case DRM_FORMAT_RGB565: + case DRM_FORMAT_BGR565: return VOP_FMT_RGB565; case DRM_FORMAT_NV12: return VOP_FMT_YUV420SP; @@ -377,6 +406,7 @@ static bool is_alpha_support(uint32_t format) { switch (format) { case DRM_FORMAT_ARGB8888: + case DRM_FORMAT_ABGR8888: return true; default: return false; @@ -587,6 +617,7 @@ static int vop_update_plane_event(struct drm_plane *plane, enum vop_data_format format; uint32_t val; bool is_alpha; + bool rb_swap; bool visible; int ret; struct drm_rect dest = { @@ -620,6 +651,7 @@ static int vop_update_plane_event(struct drm_plane *plane, return 0; is_alpha = is_alpha_support(fb->pixel_format); + rb_swap = has_rb_swapped(fb->pixel_format); format = vop_convert_format(fb->pixel_format); if (format < 0) return format; @@ -688,6 +720,7 @@ static int vop_update_plane_event(struct drm_plane *plane, val = (dsp_sty - 1) << 16; val |= (dsp_stx - 1) & 0xffff; VOP_WIN_SET(vop, win, dsp_st, val); + VOP_WIN_SET(vop, win, rb_swap, rb_swap); if (is_alpha) { VOP_WIN_SET(vop, win, dst_alpha_ctl,