[0/2] drm: bridge/dw_hdmi: add I2C bus adapter support

Commit Message

Vladimir Zapolskiy May 17, 2015, 6:03 p.m. UTC

This change adds support of internal HDMI I2C master controller,
originally the controller has its own separate driver written from
scratch http://patchwork.ozlabs.org/patch/405100 but due to shared
register space and interrupt with HDMI driver, it makes sense to
merge the code of both drivers.

The main purpose of this functionality is to support reading EDID from
an HDMI monitor on boards, which don't have an I2C bus connected to
DDC pins.

To use/test the change "ddc-i2c-bus" DT property must be omitted and
pin settings must be updated accordingly, here is an example for
iMX6 SabreLite:

-----------8<-----------
-----------8<-----------

Vladimir Zapolskiy (2):
  drm: bridge: fix register I2CM_ADDRESS register name
  drm: bridge: add dw hdmi i2c bus adapter support

 drivers/gpu/drm/bridge/dw_hdmi.c | 332 ++++++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/bridge/dw_hdmi.h |   8 +-
 2 files changed, 330 insertions(+), 10 deletions(-)

Patch

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 0b28a9d..22d4431 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -174,7 +174,6 @@ 
 };
 
 &hdmi {
-	ddc-i2c-bus = <&i2c2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi>;
 	status = "okay";
 };
 
@@ -193,13 +192,6 @@ 
 	};
 };
 
-&i2c2 {
-	clock-frequency = <100000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c2>;
-	status = "okay";
-};
-
 &i2c3 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -284,10 +276,10 @@ 
 			>;
 		};
 
-		pinctrl_i2c2: i2c2grp {
+		pinctrl_hdmi: hdmigrp {
 			fsl,pins = <
-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
+				MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL	0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA	0x4001b8b1
 			>;
 		};