From patchwork Sun May 17 18:03:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 6425261 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 48CFAC0432 for ; Sun, 17 May 2015 18:10:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 527BD205ED for ; Sun, 17 May 2015 18:10:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5419D2041C for ; Sun, 17 May 2015 18:10:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 991766E03B; Sun, 17 May 2015 11:10:36 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from relay1.mentorg.com (relay1.mentorg.com [192.94.38.131]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E7526E03B for ; Sun, 17 May 2015 11:10:35 -0700 (PDT) Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-01.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1Yu2ua-0005nh-U9 from Vladimir_Zapolskiy@mentor.com ; Sun, 17 May 2015 11:03:41 -0700 Received: from eyas.fin.mentorg.com (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server (TLS) id 14.3.224.2; Sun, 17 May 2015 19:03:39 +0100 From: Vladimir Zapolskiy To: Philipp Zabel , David Airlie , Russell King , Andy Yan , Yakir Yang , Fabio Estevam Subject: [PATCH 0/2] drm: bridge/dw_hdmi: add I2C bus adapter support Date: Sun, 17 May 2015 21:03:25 +0300 Message-ID: <1431885807-29887-1-git-send-email-vladimir_zapolskiy@mentor.com> X-Mailer: git-send-email 2.1.4 MIME-Version: 1.0 X-Originating-IP: [137.202.0.76] Cc: dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This change adds support of internal HDMI I2C master controller, originally the controller has its own separate driver written from scratch http://patchwork.ozlabs.org/patch/405100 but due to shared register space and interrupt with HDMI driver, it makes sense to merge the code of both drivers. The main purpose of this functionality is to support reading EDID from an HDMI monitor on boards, which don't have an I2C bus connected to DDC pins. To use/test the change "ddc-i2c-bus" DT property must be omitted and pin settings must be updated accordingly, here is an example for iMX6 SabreLite: -----------8<----------- -----------8<----------- Vladimir Zapolskiy (2): drm: bridge: fix register I2CM_ADDRESS register name drm: bridge: add dw hdmi i2c bus adapter support drivers/gpu/drm/bridge/dw_hdmi.c | 332 ++++++++++++++++++++++++++++++++++++++- drivers/gpu/drm/bridge/dw_hdmi.h | 8 +- 2 files changed, 330 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 0b28a9d..22d4431 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -174,7 +174,6 @@ }; &hdmi { - ddc-i2c-bus = <&i2c2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; status = "okay"; }; @@ -193,13 +192,6 @@ }; }; -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; -}; - &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -284,10 +276,10 @@ >; }; - pinctrl_i2c2: i2c2grp { + pinctrl_hdmi: hdmigrp { fsl,pins = < - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 >; };