From patchwork Thu May 21 15:02:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Padovan X-Patchwork-Id: 6456041 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3712CC0432 for ; Thu, 21 May 2015 15:03:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7919B20499 for ; Thu, 21 May 2015 15:03:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D835820483 for ; Thu, 21 May 2015 15:03:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09BB76E93C; Thu, 21 May 2015 08:03:10 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qg0-f41.google.com (mail-qg0-f41.google.com [209.85.192.41]) by gabe.freedesktop.org (Postfix) with ESMTP id 85B636E93C for ; Thu, 21 May 2015 08:03:08 -0700 (PDT) Received: by qgez61 with SMTP id z61so37712584qge.1 for ; Thu, 21 May 2015 08:03:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=afd5ODyKlwyd7xpHFqnF71GVB9whYp0eqsJkmzvH41Y=; b=JHWSvWNgTif9JfUFxe/QiSjWxkmuHv3WyrZOCtiopF/ZVd/0/w3EOJiveGJc6oRCsJ 0QP56W60JTKZqrDUQfSYoaYZ1fj9LVOnKczGnv0Z3G0RGh5DzyVf/CbyUyosC+CnAbUx AJG4KaiU3OwfNgNQJj0Wnw3h/hFkT+Bz81RrB0XEgr67Y/nukbeb+TF0OFGdPbbZMCir IiXUdFF88xGyIuqgWHSfA7uPlC8mWQBuqx1PKmQjjhc0S/w/JHIhzGiiK2031CnXretl 1wtqFWRms0MWpolZXtFElVB39KRBS/cbtiH9ab+Bzw7cErqZzKMz7rZ82XP3Fsp7zSNl i+JQ== X-Received: by 10.55.56.205 with SMTP id f196mr7196236qka.68.1432220588114; Thu, 21 May 2015 08:03:08 -0700 (PDT) Received: from jade.localdomain ([177.9.52.6]) by mx.google.com with ESMTPSA id x142sm13481356qkx.28.2015.05.21.08.03.05 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 May 2015 08:03:07 -0700 (PDT) From: Gustavo Padovan To: linux-samsung-soc@vger.kernel.org Subject: [PATCH v5 01/12] drm/exynos: atomic phase 1: use drm_plane_helper_update() Date: Thu, 21 May 2015 12:02:44 -0300 Message-Id: <1432220576-18532-2-git-send-email-gustavo@padovan.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1432220576-18532-1-git-send-email-gustavo@padovan.org> References: <1432220576-18532-1-git-send-email-gustavo@padovan.org> Cc: tjakobi@math.uni-bielefeld.de, Gustavo Padovan , dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Gustavo Padovan Rip out the check from exynos_update_plane() and create exynos_check_plane() for the check phase enabling use to use the atomic helpers to call our check and update phases when updating planes. Update all users of exynos_update_plane() accordingly to call exynos_check_plane() before. Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 29 +++++++++++----------- drivers/gpu/drm/exynos/exynos_drm_plane.c | 40 +++++++++++++++++++++++-------- drivers/gpu/drm/exynos/exynos_drm_plane.h | 2 +- 3 files changed, 46 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index eb49195..1c0d936 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -116,6 +116,7 @@ static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *fb = crtc->primary->fb; unsigned int crtc_w; unsigned int crtc_h; + int ret; /* when framebuffer changing is requested, crtc's dpms should be on */ if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) { @@ -123,11 +124,16 @@ static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, return -EPERM; } + ret = exynos_check_plane(crtc->primary, fb); + if (ret) + return ret; + crtc_w = fb->width - x; crtc_h = fb->height - y; + exynos_update_plane(crtc->primary, crtc, fb, 0, 0, + crtc_w, crtc_h, x, y, crtc_w, crtc_h); - return exynos_update_plane(crtc->primary, crtc, fb, 0, 0, - crtc_w, crtc_h, x, y, crtc_w, crtc_h); + return 0; } static void exynos_drm_crtc_disable(struct drm_crtc *crtc) @@ -164,7 +170,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, { struct drm_device *dev = crtc->dev; struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); - struct drm_framebuffer *old_fb = crtc->primary->fb; unsigned int crtc_w, crtc_h; int ret; @@ -183,6 +188,10 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, goto out; } + ret = exynos_check_plane(crtc->primary, fb); + if (ret) + goto out; + ret = drm_vblank_get(dev, exynos_crtc->pipe); if (ret) { DRM_DEBUG("failed to acquire vblank counter\n"); @@ -201,17 +210,9 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, crtc->primary->fb = fb; crtc_w = fb->width - crtc->x; crtc_h = fb->height - crtc->y; - ret = exynos_update_plane(crtc->primary, crtc, fb, 0, 0, - crtc_w, crtc_h, crtc->x, crtc->y, - crtc_w, crtc_h); - if (ret) { - crtc->primary->fb = old_fb; - spin_lock_irq(&dev->event_lock); - exynos_crtc->event = NULL; - drm_vblank_put(dev, exynos_crtc->pipe); - spin_unlock_irq(&dev->event_lock); - return ret; - } + exynos_update_plane(crtc->primary, crtc, fb, 0, 0, + crtc_w, crtc_h, crtc->x, crtc->y, + crtc_w, crtc_h); return 0; diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index 13ea334..5a938b1 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -144,21 +144,15 @@ void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, plane->crtc = crtc; } -int +void exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) { - struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); - int ret; - - ret = exynos_check_plane(plane, fb); - if (ret < 0) - return ret; exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x >> 16, src_y >> 16, @@ -166,8 +160,6 @@ exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, if (exynos_crtc->ops->win_commit) exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos); - - return 0; } static int exynos_disable_plane(struct drm_plane *plane) @@ -183,11 +175,37 @@ static int exynos_disable_plane(struct drm_plane *plane) } static struct drm_plane_funcs exynos_plane_funcs = { - .update_plane = exynos_update_plane, + .update_plane = drm_plane_helper_update, .disable_plane = exynos_disable_plane, .destroy = drm_plane_cleanup, }; +static int exynos_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state) +{ + return exynos_check_plane(plane, state->fb); +} + +static void exynos_plane_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct drm_plane_state *state = plane->state; + + if (!state->crtc) + return; + + exynos_update_plane(plane, state->crtc, state->fb, + state->crtc_x, state->crtc_y, + state->crtc_w, state->crtc_h, + state->src_x >> 16, state->src_y >> 16, + state->src_w >> 16, state->src_h >> 16); +} + +static const struct drm_plane_helper_funcs plane_helper_funcs = { + .atomic_check = exynos_plane_atomic_check, + .atomic_update = exynos_plane_atomic_update, +}; + static void exynos_plane_attach_zpos_property(struct drm_plane *plane, unsigned int zpos) { @@ -223,6 +241,8 @@ int exynos_plane_init(struct drm_device *dev, return err; } + drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs); + exynos_plane->zpos = zpos; if (type == DRM_PLANE_TYPE_OVERLAY) diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.h b/drivers/gpu/drm/exynos/exynos_drm_plane.h index f360590..560ca71 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.h +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.h @@ -15,7 +15,7 @@ void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h); -int exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, +void exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y,