From patchwork Sun Jun 28 19:27:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 6687101 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1B32BC05AD for ; Mon, 29 Jun 2015 01:05:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 420332056D for ; Mon, 29 Jun 2015 01:05:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4E10A205B4 for ; Mon, 29 Jun 2015 01:05:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 860386E2B7; Sun, 28 Jun 2015 18:05:52 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-la0-f49.google.com (mail-la0-f49.google.com [209.85.215.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id EEB176E14A for ; Sun, 28 Jun 2015 12:28:35 -0700 (PDT) Received: by lagh6 with SMTP id h6so31649136lag.2 for ; Sun, 28 Jun 2015 12:28:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=hWqgWnl2yeAP/qmEjbs3B2bAvlfvDIuART1EpsyQZII=; b=aam/AO4iFcmRk5mSIY3xBMyzJsE2UcH3AYaGdazZFTTG0d0aFM9wyvjlm1RpRBc+TJ mTtPKW3c0gL8xfnABDDmnbSFsjsMOI6j2wOF4RdOkyV0Paw6yDjAHOaEWev/ZN95tpx8 5WKZaYeAFcJdCI3aQZvQhau5QDZILPHPdMa/RJRKV+1lkdUKZFyEGeZJm113czFJ6tXJ s7NC2Uvr90oVtGMitOTkZVPOS0SPQM5sCKvviWYocRw7mKGUJ7TeOASGVAr8xHsR64wF vWxsATej6HpG/+g3xJgn5H4AMz8OPBj9RNnHX1ZmvMR5duIoMI8QR6GUKbQ7OPJi2vyo v6mw== X-Received: by 10.112.162.38 with SMTP id xx6mr10871144lbb.110.1435519713836; Sun, 28 Jun 2015 12:28:33 -0700 (PDT) Received: from localhost.localdomain ([46.138.6.114]) by mx.google.com with ESMTPSA id tp10sm10035207lbb.4.2015.06.28.12.28.32 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 28 Jun 2015 12:28:32 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding Subject: [PATCH] gpu: host1x: Fix MLOCK's debug info Date: Sun, 28 Jun 2015 22:27:02 +0300 Message-Id: <1435519624-16444-1-git-send-email-digetx@gmail.com> X-Mailer: git-send-email 2.4.4 X-Mailman-Approved-At: Sun, 28 Jun 2015 18:05:51 -0700 Cc: linux-tegra@vger.kernel.org, Dmitry Osipenko , =?UTF-8?q?Terje=20Bergstr=C3=B6m?= , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP MLOCK's debug info, spewed on CDMA timeout, contains meaningless MLOCK owner channel ID because HOST1X_SYNC_MLOCK_OWNER_CHID_F() returns shifted value, while unshifted should be used. Fix it by changing '_F' to '_V'. Signed-off-by: Dmitry Osipenko Reviewed-By: Terje Bergstrom --- drivers/gpu/host1x/hw/debug_hw.c | 2 +- drivers/gpu/host1x/hw/hw_host1x01_sync.h | 8 ++++---- drivers/gpu/host1x/hw/hw_host1x02_sync.h | 8 ++++---- drivers/gpu/host1x/hw/hw_host1x04_sync.h | 8 ++++---- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/host1x/hw/debug_hw.c b/drivers/gpu/host1x/hw/debug_hw.c index 791de93..cc3f182 100644 --- a/drivers/gpu/host1x/hw/debug_hw.c +++ b/drivers/gpu/host1x/hw/debug_hw.c @@ -298,7 +298,7 @@ static void host1x_debug_show_mlocks(struct host1x *host, struct output *o) host1x_sync_readl(host, HOST1X_SYNC_MLOCK_OWNER(i)); if (HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(owner)) host1x_debug_output(o, "%d: locked by channel %d\n", - i, HOST1X_SYNC_MLOCK_OWNER_CHID_F(owner)); + i, HOST1X_SYNC_MLOCK_OWNER_CHID_V(owner)); else if (HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(owner)) host1x_debug_output(o, "%d: locked by cpu\n", i); else diff --git a/drivers/gpu/host1x/hw/hw_host1x01_sync.h b/drivers/gpu/host1x/hw/hw_host1x01_sync.h index ac704e5..31238c2 100644 --- a/drivers/gpu/host1x/hw/hw_host1x01_sync.h +++ b/drivers/gpu/host1x/hw/hw_host1x01_sync.h @@ -131,12 +131,12 @@ static inline u32 host1x_sync_mlock_owner_r(unsigned int id) } #define HOST1X_SYNC_MLOCK_OWNER(id) \ host1x_sync_mlock_owner_r(id) -static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) +static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) { - return (v & 0xf) << 8; + return (v >> 8) & 0xf; } -#define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ - host1x_sync_mlock_owner_chid_f(v) +#define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ + host1x_sync_mlock_owner_chid_v(v) static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) { return (r >> 1) & 0x1; diff --git a/drivers/gpu/host1x/hw/hw_host1x02_sync.h b/drivers/gpu/host1x/hw/hw_host1x02_sync.h index 4495401..540c7b6 100644 --- a/drivers/gpu/host1x/hw/hw_host1x02_sync.h +++ b/drivers/gpu/host1x/hw/hw_host1x02_sync.h @@ -131,12 +131,12 @@ static inline u32 host1x_sync_mlock_owner_r(unsigned int id) } #define HOST1X_SYNC_MLOCK_OWNER(id) \ host1x_sync_mlock_owner_r(id) -static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) +static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) { - return (v & 0xf) << 8; + return (v >> 8) & 0xf; } -#define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ - host1x_sync_mlock_owner_chid_f(v) +#define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ + host1x_sync_mlock_owner_chid_v(v) static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) { return (r >> 1) & 0x1; diff --git a/drivers/gpu/host1x/hw/hw_host1x04_sync.h b/drivers/gpu/host1x/hw/hw_host1x04_sync.h index ef2275b..3d6c8ec 100644 --- a/drivers/gpu/host1x/hw/hw_host1x04_sync.h +++ b/drivers/gpu/host1x/hw/hw_host1x04_sync.h @@ -131,12 +131,12 @@ static inline u32 host1x_sync_mlock_owner_r(unsigned int id) } #define HOST1X_SYNC_MLOCK_OWNER(id) \ host1x_sync_mlock_owner_r(id) -static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) +static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) { - return (v & 0xf) << 8; + return (v >> 8) & 0xf; } -#define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ - host1x_sync_mlock_owner_chid_f(v) +#define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ + host1x_sync_mlock_owner_chid_v(v) static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) { return (r >> 1) & 0x1;