From patchwork Thu Aug 6 16:38:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 6961271 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3BF4D9F39D for ; Thu, 6 Aug 2015 16:31:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4C05820702 for ; Thu, 6 Aug 2015 16:31:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5B15F20637 for ; Thu, 6 Aug 2015 16:31:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F0917A148; Thu, 6 Aug 2015 09:31:34 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id F0CA17A148; Thu, 6 Aug 2015 09:31:33 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP; 06 Aug 2015 09:31:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,623,1432623600"; d="scan'208";a="779156867" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by orsmga002.jf.intel.com with ESMTP; 06 Aug 2015 09:31:28 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, matthew.d.roper@intel.com, robert.bradford@intel.com, thierry.reding@gmail.com, gary.k.smith@intel.com, hverkuil@xs4all.nl, jim.bish@intel.com, intel-gfx@lists.freedesktop.org Subject: [PATCH 15/18] drm/i915: Initialize Gen8 pipe gamma correction Date: Thu, 6 Aug 2015 22:08:24 +0530 Message-Id: <1438879107-22819-16-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> References: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> Cc: annie.j.matheson@intel.com, avinash.reddy.palleti@intel.com, vijay.a.purushothaman@intel.com, kausalmalladi@gmail.com, jesse.barnes@intel.com, daniel.vetter@intel.com, kiran.s.kumar@intel.com, susanta.bhattacharjee@intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kausal Malladi This patch initializes gamma color correction proeprty for Gen8 and higher platforms. It does the following : 1. Load pipe Gamma color correction capabilities for BDW/SKL/BXT 2. Attach the color properties to CRTC Signed-off-by: Shashank Sharma Signed-off-by: Kausal Malladi --- drivers/gpu/drm/i915/intel_color_manager.c | 30 +++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_color_manager.h | 3 +++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c index 5fa575b..bc77ab5 100644 --- a/drivers/gpu/drm/i915/intel_color_manager.c +++ b/drivers/gpu/drm/i915/intel_color_manager.c @@ -475,11 +475,39 @@ int get_chv_pipe_gamma_capabilities(struct drm_device *dev, return 0; } +int get_gen9_pipe_gamma_capabilities(struct drm_device *dev, + struct drm_palette_caps *palette_caps, struct drm_crtc *crtc) +{ + struct drm_property_blob *blob = NULL; + + /* + * This function exposes best capability for DeGamma and Gamma + * For BXT, the DeGamma LUT has 512 entries + * and the best Gamma capability has 512 entries + */ + palette_caps->version = GEN9_PALETTE_STRUCT_VERSION; + palette_caps->num_samples_before_ctm = + GEN9_SPLITGAMMA_MAX_VALS; + palette_caps->num_samples_after_ctm = + GEN9_SPLITGAMMA_MAX_VALS; + + blob = drm_property_create_blob(dev, sizeof(struct drm_palette_caps), + (const void *) palette_caps); + + if (blob) + return blob->base.id; + + return 0; +} + int get_pipe_gamma_capabilities(struct drm_device *dev, struct drm_palette_caps *palette_caps, struct drm_crtc *crtc) { if (IS_CHERRYVIEW(dev)) return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc); + if (IS_BROADWELL(dev) || IS_GEN9(dev)) + return get_gen9_pipe_gamma_capabilities(dev, + palette_caps, crtc); return -EINVAL; } @@ -491,7 +519,7 @@ void intel_attach_color_properties_to_crtc(struct drm_device *dev, struct drm_crtc *crtc; int capabilities_blob_id; - if (IS_CHERRYVIEW(dev)) { + if (IS_CHERRYVIEW(dev) || IS_BROADWELL(dev) || IS_GEN9(dev)) { crtc = obj_to_crtc(mode_obj); palette_caps = kzalloc(sizeof(struct drm_palette_caps), diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h index b2ee847..78de1a2 100644 --- a/drivers/gpu/drm/i915/intel_color_manager.h +++ b/drivers/gpu/drm/i915/intel_color_manager.h @@ -35,6 +35,9 @@ #define CHV_DEGAMMA_MAX_VALS 65 #define CHV_10BIT_GAMMA_MAX_VALS 257 +#define GEN9_PALETTE_STRUCT_VERSION 1 +#define GEN9_SPLITGAMMA_MAX_VALS 512 + /* Gamma correction */ #define CHV_GAMMA_DATA_STRUCT_VERSION 1 #define CHV_10BIT_GAMMA_MAX_VALS 257