From patchwork Thu Aug 6 16:38:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 6961081 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 58CD2C05AC for ; Thu, 6 Aug 2015 16:30:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 34A4520708 for ; Thu, 6 Aug 2015 16:30:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 33D1B20702 for ; Thu, 6 Aug 2015 16:30:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2AB4C6E872; Thu, 6 Aug 2015 09:30:42 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id EC73C6E872; Thu, 6 Aug 2015 09:30:40 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 06 Aug 2015 09:30:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,623,1432623600"; d="scan'208";a="779156214" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by orsmga002.jf.intel.com with ESMTP; 06 Aug 2015 09:30:34 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, matthew.d.roper@intel.com, robert.bradford@intel.com, thierry.reding@gmail.com, gary.k.smith@intel.com, hverkuil@xs4all.nl, jim.bish@intel.com, intel-gfx@lists.freedesktop.org Subject: [PATCH 05/18] drm/i915: Initialize color manager and add gamma correction Date: Thu, 6 Aug 2015 22:08:14 +0530 Message-Id: <1438879107-22819-6-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> References: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> MIME-Version: 1.0 Cc: annie.j.matheson@intel.com, avinash.reddy.palleti@intel.com, vijay.a.purushothaman@intel.com, kausalmalladi@gmail.com, jesse.barnes@intel.com, daniel.vetter@intel.com, kiran.s.kumar@intel.com, susanta.bhattacharjee@intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kausal Malladi As per Color Manager design, each driver is responsible to load its palette color correction and enhancement capabilities in the form of a DRM blob property, so that user space can query and read. This patch does the following: 1. Create new files intel_color_manager(.c/.h) 2. Attach CRTC Palette Capabilities property to CRTC 3. Load all CHV platform specific gamma color capabilities for CRTC into a blob that can be accessible by user space to query capabilities via DRM property interface. Signed-off-by: Shashank Sharma Signed-off-by: Kausal Malladi --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/intel_color_manager.c | 83 ++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_color_manager.h | 33 ++++++++++++ drivers/gpu/drm/i915/intel_display.c | 2 + drivers/gpu/drm/i915/intel_drv.h | 4 ++ 5 files changed, 124 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/intel_color_manager.c create mode 100644 drivers/gpu/drm/i915/intel_color_manager.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 41fb8a9..303b903 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -60,7 +60,8 @@ i915-y += intel_audio.o \ intel_overlay.o \ intel_psr.o \ intel_sideband.o \ - intel_sprite.o + intel_sprite.o \ + intel_color_manager.o i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o i915-$(CONFIG_DRM_I915_FBDEV) += intel_fbdev.o diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c new file mode 100644 index 0000000..1c9c477 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_color_manager.c @@ -0,0 +1,83 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Shashank Sharma + * Kausal Malladi + */ + +#include "intel_color_manager.h" + +int get_chv_pipe_gamma_capabilities(struct drm_device *dev, + struct drm_palette_caps *palette_caps, struct drm_crtc *crtc) +{ + struct drm_property_blob *blob; + + /* + * This function exposes best capability for DeGamma and Gamma + * For CHV, the DeGamma LUT has 65 entries + * and the best Gamma capability has 257 entries (CGM unit) + */ + palette_caps->version = CHV_PALETTE_STRUCT_VERSION; + palette_caps->num_samples_before_ctm = + CHV_DEGAMMA_MAX_VALS; + palette_caps->num_samples_after_ctm = + CHV_10BIT_GAMMA_MAX_VALS; + + blob = drm_property_create_blob(dev, sizeof(struct drm_palette_caps), + (const void *) palette_caps); + + if (blob) + return blob->base.id; + + return 0; +} + +int get_pipe_gamma_capabilities(struct drm_device *dev, + struct drm_palette_caps *palette_caps, struct drm_crtc *crtc) +{ + if (IS_CHERRYVIEW(dev)) + return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc); + return -EINVAL; +} + +void intel_attach_color_properties_to_crtc(struct drm_device *dev, + struct drm_mode_object *mode_obj) +{ + struct drm_mode_config *config = &dev->mode_config; + struct drm_palette_caps *palette_caps; + struct drm_crtc *crtc; + int capabilities_blob_id; + + if (IS_CHERRYVIEW(dev)) { + crtc = obj_to_crtc(mode_obj); + + palette_caps = kzalloc(sizeof(struct drm_palette_caps), + GFP_KERNEL); + capabilities_blob_id = get_pipe_gamma_capabilities(dev, palette_caps, crtc); + kfree(palette_caps); + if (config->cm_crtc_palette_capabilities_property) + drm_object_attach_property(mode_obj, + config->cm_crtc_palette_capabilities_property, + capabilities_blob_id); + } +} diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h new file mode 100644 index 0000000..51aeb91 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_color_manager.h @@ -0,0 +1,33 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Shashank Sharma + * Kausal Malladi + */ +#include +#include +#include "i915_drv.h" + +#define CHV_PALETTE_STRUCT_VERSION 1 +#define CHV_DEGAMMA_MAX_VALS 65 +#define CHV_10BIT_GAMMA_MAX_VALS 257 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1412e21..349a1c2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13975,6 +13975,8 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) intel_crtc->wm.cxsr_allowed = true; + intel_attach_color_properties_to_crtc(dev, &intel_crtc->base.base); + BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) || dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL); dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b3dc138..dee5f91 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1438,4 +1438,8 @@ void intel_plane_destroy_state(struct drm_plane *plane, struct drm_plane_state *state); extern const struct drm_plane_helper_funcs intel_plane_helper_funcs; +/* intel_color_manager.c */ +void intel_attach_color_properties_to_crtc(struct drm_device *dev, + struct drm_mode_object *mode_obj); + #endif /* __INTEL_DRV_H__ */