From patchwork Sun Aug 23 00:57:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grazvydas Ignotas X-Patchwork-Id: 7056781 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8A80DC05AC for ; Sun, 23 Aug 2015 00:57:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E4036206DF for ; Sun, 23 Aug 2015 00:57:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 36D49206A4 for ; Sun, 23 Aug 2015 00:57:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 84F476E069; Sat, 22 Aug 2015 17:57:45 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wi0-f172.google.com (mail-wi0-f172.google.com [209.85.212.172]) by gabe.freedesktop.org (Postfix) with ESMTPS id F108B6E82A for ; Sat, 22 Aug 2015 17:57:43 -0700 (PDT) Received: by wicne3 with SMTP id ne3so42828137wic.0 for ; Sat, 22 Aug 2015 17:57:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=L5ELgh9TzUw0fDE/sXKU6x3zJpl87c3xzgibcQ8INao=; b=E3V8pn8fjCDnejKr/gQK9LNIHBjYklRn5fEd/CA4timeeGG8hU5gSNmES7FWIy/Xr/ e/LiuYucM70M9tgzek0BIO3U1L4d5wXhkOcDHp4SoY4k9Ulq55hgkedd3sSIMdQ/9RtM r5zDYGpfRIvq1Mcz8TzlmYWVVeaP8CvIAcfQSD2aW4LDsSPW1mi5OelCUYvJIikKc8UN 4LJRTPDm667puPA5yKZKwlB551ZFpm8SHhg7MPIf2wi4bKPa8QhEoijhbT/kC4zPNr2R yr1ri587Ajugot6UsgwROmzrnjE1HTQAxRFRney6eV0RmAlyMON0TRIjK2Dcd7I6JYcd i0Hg== X-Received: by 10.180.106.68 with SMTP id gs4mr17016523wib.61.1440291462698; Sat, 22 Aug 2015 17:57:42 -0700 (PDT) Received: from localhost.localdomain ([5.20.220.27]) by smtp.gmail.com with ESMTPSA id gt10sm9453176wib.20.2015.08.22.17.57.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 22 Aug 2015 17:57:42 -0700 (PDT) From: Grazvydas Ignotas To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/4] drm/radeon: simplify register checker Date: Sun, 23 Aug 2015 03:57:35 +0300 Message-Id: <1440291458-11602-2-git-send-email-notasas@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440291458-11602-1-git-send-email-notasas@gmail.com> References: <1440291458-11602-1-git-send-email-notasas@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To avoid having to distinguish between CAYMAN or older on every register check, place a pointer in evergreen_cs_track and use it unconditionally. Also make use of the fact that both reg_safe_bm[] arrays are of the same length to remove another CAYMAN check. Signed-off-by: Grazvydas Ignotas --- drivers/gpu/drm/radeon/evergreen_cs.c | 49 +++++++++++++---------------------- 1 file changed, 18 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index c9e0fbb..5c840da 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -34,6 +34,8 @@ #define MAX(a,b) (((a)>(b))?(a):(b)) #define MIN(a,b) (((a)<(b))?(a):(b)) +#define REG_SAFE_BM_SIZE ARRAY_SIZE(evergreen_reg_safe_bm) + int r600_dma_cs_next_reloc(struct radeon_cs_parser *p, struct radeon_bo_list **cs_reloc); struct evergreen_cs_track { @@ -84,6 +86,7 @@ struct evergreen_cs_track { u32 htile_surface; struct radeon_bo *htile_bo; unsigned long indirect_draw_buffer_size; + const unsigned *reg_safe_bm; }; static u32 evergreen_cs_get_aray_mode(u32 tiling_flags) @@ -1096,28 +1099,17 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) { struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track; struct radeon_bo_list *reloc; - u32 last_reg; u32 m, i, tmp, *ib; int r; - if (p->rdev->family >= CHIP_CAYMAN) - last_reg = ARRAY_SIZE(cayman_reg_safe_bm); - else - last_reg = ARRAY_SIZE(evergreen_reg_safe_bm); - i = (reg >> 7); - if (i >= last_reg) { + if (unlikely(i >= REG_SAFE_BM_SIZE)) { dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return -EINVAL; } m = 1 << ((reg >> 2) & 31); - if (p->rdev->family >= CHIP_CAYMAN) { - if (!(cayman_reg_safe_bm[i] & m)) - return 0; - } else { - if (!(evergreen_reg_safe_bm[i] & m)) - return 0; - } + if (!(track->reg_safe_bm[i] & m)) + return 0; ib = p->ib.ptr; switch (reg) { /* force following reg to 0 in an attempt to disable out buffer @@ -1766,26 +1758,17 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) static bool evergreen_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) { - u32 last_reg, m, i; - - if (p->rdev->family >= CHIP_CAYMAN) - last_reg = ARRAY_SIZE(cayman_reg_safe_bm); - else - last_reg = ARRAY_SIZE(evergreen_reg_safe_bm); + struct evergreen_cs_track *track = p->track; + u32 m, i; i = (reg >> 7); - if (i >= last_reg) { + if (unlikely(i >= REG_SAFE_BM_SIZE)) { dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return false; } m = 1 << ((reg >> 2) & 31); - if (p->rdev->family >= CHIP_CAYMAN) { - if (!(cayman_reg_safe_bm[i] & m)) - return true; - } else { - if (!(evergreen_reg_safe_bm[i] & m)) - return true; - } + if (!(track->reg_safe_bm[i] & m)) + return true; dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return false; } @@ -2644,11 +2627,15 @@ int evergreen_cs_parse(struct radeon_cs_parser *p) if (track == NULL) return -ENOMEM; evergreen_cs_track_init(track); - if (p->rdev->family >= CHIP_CAYMAN) + if (p->rdev->family >= CHIP_CAYMAN) { tmp = p->rdev->config.cayman.tile_config; - else + track->reg_safe_bm = cayman_reg_safe_bm; + } else { tmp = p->rdev->config.evergreen.tile_config; - + track->reg_safe_bm = evergreen_reg_safe_bm; + } + BUILD_BUG_ON(ARRAY_SIZE(cayman_reg_safe_bm) != REG_SAFE_BM_SIZE); + BUILD_BUG_ON(ARRAY_SIZE(evergreen_reg_safe_bm) != REG_SAFE_BM_SIZE); switch (tmp & 0xf) { case 0: track->npipes = 1;