From patchwork Fri Sep 25 11:57:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 7263821 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6BE079F380 for ; Fri, 25 Sep 2015 11:58:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1C08520AFD for ; Fri, 25 Sep 2015 11:58:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 30EB020AEC for ; Fri, 25 Sep 2015 11:58:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5CBAA6F0A6; Fri, 25 Sep 2015 04:58:08 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from metis.ext.pengutronix.de (metis.ext.4.pengutronix.de [92.198.50.35]) by gabe.freedesktop.org (Postfix) with ESMTPS id EFB7C6F0A5 for ; Fri, 25 Sep 2015 04:58:04 -0700 (PDT) Received: from weser.hi.4.pengutronix.de ([10.1.0.109] helo=weser.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1ZfRda-0004Em-Op; Fri, 25 Sep 2015 13:58:02 +0200 From: Lucas Stach To: Russell King , Christian Gmeiner Subject: [PATCH 27/48] staging: etnaviv: provide a helper to load the GPU clock field Date: Fri, 25 Sep 2015 13:57:39 +0200 Message-Id: <1443182280-15868-28-git-send-email-l.stach@pengutronix.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1443182280-15868-1-git-send-email-l.stach@pengutronix.de> References: <20150916080435.GA21084@n2100.arm.linux.org.uk> <1443182280-15868-1-git-send-email-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.109 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: dri-devel@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Russell King The GPU requires a double-write to set the clock divisor. Rather than open-coding this knowledge in a couple of places, provide a helper to do this instead. This avoids spreading this knowledge around the driver. Signed-off-by: Russell King --- drivers/staging/etnaviv/etnaviv_gpu.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/staging/etnaviv/etnaviv_gpu.c b/drivers/staging/etnaviv/etnaviv_gpu.c index b12d46075732..d274fcf9f5b1 100644 --- a/drivers/staging/etnaviv/etnaviv_gpu.c +++ b/drivers/staging/etnaviv/etnaviv_gpu.c @@ -280,6 +280,13 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) etnaviv_hw_specs(gpu); } +static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock) +{ + gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock | + VIVS_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD); + gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); +} + static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) { u32 control, idle; @@ -301,9 +308,7 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(0x40); /* enable clock */ - gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control | - VIVS_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD); - gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); + etnaviv_gpu_load_clock(gpu, control); /* Wait for stable clock. Vivante's code waited for 1ms */ usleep_range(1000, 10000); @@ -367,9 +372,7 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(0x40); /* enable clock */ - gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control | - VIVS_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD); - gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); + etnaviv_gpu_load_clock(gpu, control); return 0; }