From patchwork Sat Oct 10 09:55:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 7381181 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 56CF49F302 for ; Tue, 13 Oct 2015 02:21:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 721AE20667 for ; Tue, 13 Oct 2015 02:21:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D819820986 for ; Tue, 13 Oct 2015 02:21:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F10718A42D; Mon, 12 Oct 2015 19:20:16 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pa0-f46.google.com (mail-pa0-f46.google.com [209.85.220.46]) by gabe.freedesktop.org (Postfix) with ESMTPS id 586FD6E754 for ; Sat, 10 Oct 2015 02:56:12 -0700 (PDT) Received: by pablk4 with SMTP id lk4so109424461pab.3 for ; Sat, 10 Oct 2015 02:56:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TyntBdKHLEqOBKa/R80P+cZji+n/t6/UQe95Ac2C2YA=; b=HykNcI3tIs+xEE05x5OaE6wRRRwqBs1bFELtoB7m8PnXAgaIVgL1SmIkaFuDiQprgA ULWpwUEz3oJLqdpw6cbbfGpdCpVk0tZjc/hBMBuKSkxISz0mfYN6p1BnEcqXV7HSpmpZ QhVV8PFKwi+uX2Bs9erL/Vg++voH7CeRf1gpKGMzkoK2j5ygVPdd9WMc+DJo/4QFsml0 NUBIRuroyxb/S+XGUTQFi4xViZiIiW87aDaY5OBMwmgOhJUclWF6s4ERE2RosK+ixaOh 4zE+z8fH2lYE/irZHOnGCFPiruiRICT7ngYB1hWwl8RKKeL+0vNDVjkWbg940eXUEkt0 U+NA== X-Received: by 10.66.144.135 with SMTP id sm7mr21907422pab.106.1444470972040; Sat, 10 Oct 2015 02:56:12 -0700 (PDT) Received: from localhost.localdomain ([192.253.240.50]) by smtp.gmail.com with ESMTPSA id wi10sm7235351pbc.31.2015.10.10.02.56.06 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 10 Oct 2015 02:56:11 -0700 (PDT) From: Chris Zhong To: heiko@sntech.de, linux-rockchip@lists.infradead.org Subject: [PATCH 02/10] drm/rockchip: return a true clock rate to adjusted_mode Date: Sat, 10 Oct 2015 17:55:22 +0800 Message-Id: <1444470930-17150-3-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1444470930-17150-1-git-send-email-zyw@rock-chips.com> References: <1444470930-17150-1-git-send-email-zyw@rock-chips.com> X-Mailman-Approved-At: Mon, 12 Oct 2015 19:19:40 -0700 Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Chris Zhong , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sometimes the clock driver can not set a accurate clock_rate for vop, get the true rate of vop_dclk and set it back to adjusted_mode, since the mipi dsi driver need to use the clock to make the calculation of Blanking. Signed-off-by: Chris Zhong --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 5d8ae5e..9986b311ed 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1232,6 +1232,12 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, reset_control_deassert(vop->dclk_rst); clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); + + /* + * Sometimes the clock driver can not set a accurate clock_rate for vop, + * get the true rate of vop_dclk and set it back to adjusted_mode. + */ + adjusted_mode->clock = clk_get_rate(vop->dclk) / 1000; out: ret_clk = clk_enable(vop->dclk); if (ret_clk < 0) {