From patchwork Fri Oct 23 17:56:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 7474821 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5F51D9F302 for ; Fri, 23 Oct 2015 17:59:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 81BF7209FA for ; Fri, 23 Oct 2015 17:59:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 85BA120A00 for ; Fri, 23 Oct 2015 17:59:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2427A7A172; Fri, 23 Oct 2015 10:59:25 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 4EB48722E7; Fri, 23 Oct 2015 10:59:23 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 23 Oct 2015 10:56:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,187,1444719600"; d="scan'208";a="833607296" Received: from snipes.jf.intel.com (HELO snipes.localdomain) ([10.7.198.156]) by orsmga002.jf.intel.com with ESMTP; 23 Oct 2015 10:56:38 -0700 From: Ben Widawsky To: mesa-dev , DRI Development Subject: [PATCH 2/2] intel: Cleanup SKL PCI ID definitions. Date: Fri, 23 Oct 2015 10:56:34 -0700 Message-Id: <1445622994-28750-2-git-send-email-benjamin.widawsky@intel.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1445622994-28750-1-git-send-email-benjamin.widawsky@intel.com> References: <1445622994-28750-1-git-send-email-benjamin.widawsky@intel.com> MIME-Version: 1.0 Cc: Ben Widawsky X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This removes ones which aren't used 0x190b, 192a), and adds some new ones. I kept the original names where possible. Cc: Kristian Høgsberg Cc: Damien Lespiau Signed-off-by: Ben Widawsky --- intel/intel_chipset.h | 46 ++++++++++++++++++++++++++-------------------- 1 file changed, 26 insertions(+), 20 deletions(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 6c8dc73..a0f17c6 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -165,21 +165,24 @@ #define PCI_CHIP_CHERRYVIEW_2 0x22b2 #define PCI_CHIP_CHERRYVIEW_3 0x22b3 -#define PCI_CHIP_SKYLAKE_ULT_GT2 0x1916 +#define PCI_CHIP_SKYLAKE_DT_GT1 0x1902 #define PCI_CHIP_SKYLAKE_ULT_GT1 0x1906 -#define PCI_CHIP_SKYLAKE_ULT_GT3 0x1926 -#define PCI_CHIP_SKYLAKE_ULT_GT2F 0x1921 -#define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E -#define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E +#define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A /* Reserved */ +#define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E /* Reserved */ #define PCI_CHIP_SKYLAKE_DT_GT2 0x1912 -#define PCI_CHIP_SKYLAKE_DT_GT1 0x1902 +#define PCI_CHIP_SKYLAKE_FUSED0_GT2 0x1913 /* Reserved */ +#define PCI_CHIP_SKYLAKE_FUSED1_GT2 0x1915 /* Reserved */ +#define PCI_CHIP_SKYLAKE_ULT_GT2 0x1916 +#define PCI_CHIP_SKYLAKE_FUSED2_GT2 0x1917 /* Reserved */ +#define PCI_CHIP_SKYLAKE_SRV_GT2 0x191A /* Reserved */ #define PCI_CHIP_SKYLAKE_HALO_GT2 0x191B -#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B -#define PCI_CHIP_SKYLAKE_HALO_GT1 0x190B -#define PCI_CHIP_SKYLAKE_SRV_GT2 0x191A -#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192A -#define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D +#define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E +#define PCI_CHIP_SKYLAKE_MOBILE_GT2 0x1921 /* Reserved */ +#define PCI_CHIP_SKYLAKE_GT3E_540 0x1923 +#define PCI_CHIP_SKYLAKE_GT3 0x1926 +#define PCI_CHIP_SKYLAKE_GT3E_550 0x1927 +#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */ #define PCI_CHIP_SKYLAKE_DT_GT4 0x1932 #define PCI_CHIP_SKYLAKE_SRV_GT4 0x193A #define PCI_CHIP_SKYLAKE_H_GT4 0x193B @@ -351,20 +354,23 @@ #define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_ULX_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \ - (devid) == PCI_CHIP_SKYLAKE_HALO_GT1 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT1) -#define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT2 || \ - (devid) == PCI_CHIP_SKYLAKE_ULT_GT2F || \ - (devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \ - (devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \ - (devid) == PCI_CHIP_SKYLAKE_HALO_GT2 || \ +#define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_FUSED1_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_ULT_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_FUSED2_GT2 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT2 || \ - (devid) == PCI_CHIP_SKYLAKE_WKS_GT2) + (devid) == PCI_CHIP_SKYLAKE_HALO_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_WKS_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2) -#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3 || \ +#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_GT3 || \ (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \ - (devid) == PCI_CHIP_SKYLAKE_SRV_GT3) + (devid) == PCI_CHIP_SKYLAKE_GT3E_540 || \ + (devid) == PCI_CHIP_SKYLAKE_GT3E_550) #define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \ (devid) == PCI_CHIP_SKYLAKE_SRV_GT4 || \