From patchwork Thu Nov 12 06:18:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 7599581 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7EB35C05CA for ; Thu, 12 Nov 2015 06:19:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68AB5207DD for ; Thu, 12 Nov 2015 06:19:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 17279207D1 for ; Thu, 12 Nov 2015 06:19:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6C3317A092; Wed, 11 Nov 2015 22:19:12 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qg0-f42.google.com (mail-qg0-f42.google.com [209.85.192.42]) by gabe.freedesktop.org (Postfix) with ESMTPS id 077637A092 for ; Wed, 11 Nov 2015 22:19:11 -0800 (PST) Received: by qgeb1 with SMTP id b1so40747482qge.1 for ; Wed, 11 Nov 2015 22:19:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BoiEUC4sYLxoATGAmsDrDag4SviPN3jWIhvuq4RMe7s=; b=ObC4XWeU5roaj/1+r++x7N037nBpjDmODqBOYYY4BHtE60XR58O2kdEXDZyGTswyRe N6UK4S9qKdGdri3yFFvxwF3xpcQxgd6LJH5twiMVvJWH4D8ti89jTaqNOJs52ZjVKAE6 ldDDDMgcATntm/ZHoHu1WN5xkSoL6H+5yA83lQ776C34w+adxd7906CKzggAXOKGWip0 8qgWD45+PSuiBnTL3z0MIkpf1W9+vFGda0JDm4Z+g5ywTDZlNRCzCRJKXJJRtYmgDjpY 3rROy4UhwoPHQhFK7Kf6gfQDGM+xx+M1GQuWZ7f+SWUSNVZCefCDm0cDadG3cgvbV0DL 5lSA== X-Received: by 10.140.239.87 with SMTP id k84mr14128231qhc.87.1447309150344; Wed, 11 Nov 2015 22:19:10 -0800 (PST) Received: from localhost.localdomain (static-74-96-105-49.washdc.fios.verizon.net. [74.96.105.49]) by smtp.gmail.com with ESMTPSA id 202sm3693748qhc.49.2015.11.11.22.19.09 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 11 Nov 2015 22:19:09 -0800 (PST) From: Alex Deucher X-Google-Original-From: Alex Deucher To: dri-devel@lists.freedesktop.org Subject: [PATCH 18/51] drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay. Date: Thu, 12 Nov 2015 01:18:08 -0500 Message-Id: <1447309121-2480-19-git-send-email-alexander.deucher@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1447309121-2480-1-git-send-email-alexander.deucher@amd.com> References: <1447309121-2480-1-git-send-email-alexander.deucher@amd.com> Cc: yanyang1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: yanyang1 Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay. Reviewed-by: Alex Deucher Signed-off-by: yanyang1 --- drivers/gpu/drm/amd/amdgpu/smu7.h | 170 ------- drivers/gpu/drm/amd/amdgpu/smu7_discrete.h | 514 ---------------------- drivers/gpu/drm/amd/amdgpu/smu7_fusion.h | 300 ------------- drivers/gpu/drm/amd/powerplay/inc/smu7.h | 170 +++++++ drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h | 514 ++++++++++++++++++++++ drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h | 300 +++++++++++++ 6 files changed, 984 insertions(+), 984 deletions(-) delete mode 100644 drivers/gpu/drm/amd/amdgpu/smu7.h delete mode 100644 drivers/gpu/drm/amd/amdgpu/smu7_discrete.h delete mode 100644 drivers/gpu/drm/amd/amdgpu/smu7_fusion.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu7.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h diff --git a/drivers/gpu/drm/amd/amdgpu/smu7.h b/drivers/gpu/drm/amd/amdgpu/smu7.h deleted file mode 100644 index 75a380a..0000000 --- a/drivers/gpu/drm/amd/amdgpu/smu7.h +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Copyright 2013 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef SMU7_H -#define SMU7_H - -#pragma pack(push, 1) - -#define SMU7_CONTEXT_ID_SMC 1 -#define SMU7_CONTEXT_ID_VBIOS 2 - - -#define SMU7_CONTEXT_ID_SMC 1 -#define SMU7_CONTEXT_ID_VBIOS 2 - -#define SMU7_MAX_LEVELS_VDDC 8 -#define SMU7_MAX_LEVELS_VDDCI 4 -#define SMU7_MAX_LEVELS_MVDD 4 -#define SMU7_MAX_LEVELS_VDDNB 8 - -#define SMU7_MAX_LEVELS_GRAPHICS SMU__NUM_SCLK_DPM_STATE // SCLK + SQ DPM + ULV -#define SMU7_MAX_LEVELS_MEMORY SMU__NUM_MCLK_DPM_LEVELS // MCLK Levels DPM -#define SMU7_MAX_LEVELS_GIO SMU__NUM_LCLK_DPM_LEVELS // LCLK Levels -#define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. -#define SMU7_MAX_LEVELS_UVD 8 // VCLK/DCLK levels for UVD. -#define SMU7_MAX_LEVELS_VCE 8 // ECLK levels for VCE. -#define SMU7_MAX_LEVELS_ACP 8 // ACLK levels for ACP. -#define SMU7_MAX_LEVELS_SAMU 8 // SAMCLK levels for SAMU. -#define SMU7_MAX_ENTRIES_SMIO 32 // Number of entries in SMIO table. - -#define DPM_NO_LIMIT 0 -#define DPM_NO_UP 1 -#define DPM_GO_DOWN 2 -#define DPM_GO_UP 3 - -#define SMU7_FIRST_DPM_GRAPHICS_LEVEL 0 -#define SMU7_FIRST_DPM_MEMORY_LEVEL 0 - -#define GPIO_CLAMP_MODE_VRHOT 1 -#define GPIO_CLAMP_MODE_THERM 2 -#define GPIO_CLAMP_MODE_DC 4 - -#define SCRATCH_B_TARG_PCIE_INDEX_SHIFT 0 -#define SCRATCH_B_TARG_PCIE_INDEX_MASK (0x7<