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[74.96.105.49]) by smtp.gmail.com with ESMTPSA id 202sm3693748qhc.49.2015.11.11.22.19.02 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 11 Nov 2015 22:19:03 -0800 (PST) From: Alex Deucher X-Google-Original-From: Alex Deucher To: dri-devel@lists.freedesktop.org Subject: [PATCH 06/51] drm/amdgpu: add new cgs interface to get display info (v2) Date: Thu, 12 Nov 2015 01:17:56 -0500 Message-Id: <1447309121-2480-7-git-send-email-alexander.deucher@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1447309121-2480-1-git-send-email-alexander.deucher@amd.com> References: <1447309121-2480-1-git-send-email-alexander.deucher@amd.com> Cc: Rex Zhu X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rex Zhu Add new CGS interfaces to query display info across modules. This is nedded by the powerplay module for synchronizing with the display module. v2: (agd): fold in refresh rate fix, rebase Signed-off-by: Rex Zhu Reviewed-by: Jammy Zhou Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 40 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/amd/include/cgs_common.h | 20 ++++++++++++++++ 2 files changed, 60 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c index 19f46d0..8f758ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c @@ -758,6 +758,45 @@ static int amdgpu_cgs_query_system_info(void *cgs_device, return 0; } +static int amdgpu_cgs_get_active_displays_info(void *cgs_device, + struct cgs_display_info *info) +{ + CGS_FUNC_ADEV; + struct amdgpu_crtc *amdgpu_crtc; + struct drm_device *ddev = adev->ddev; + struct drm_crtc *crtc; + uint32_t line_time_us, vblank_lines; + + if (info == NULL) + return -EINVAL; + + if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, + &ddev->mode_config.crtc_list, head) { + amdgpu_crtc = to_amdgpu_crtc(crtc); + if (crtc->enabled) { + info->active_display_mask |= (1 << amdgpu_crtc->crtc_id); + info->display_count++; + } + if (info->mode_info != NULL && + crtc->enabled && amdgpu_crtc->enabled && + amdgpu_crtc->hw_mode.clock) { + line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) / + amdgpu_crtc->hw_mode.clock; + vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end - + amdgpu_crtc->hw_mode.crtc_vdisplay + + (amdgpu_crtc->v_border * 2); + info->mode_info->vblank_time_us = vblank_lines * line_time_us; + info->mode_info->refresh_rate = drm_mode_vrefresh(&amdgpu_crtc->hw_mode); + info->mode_info->ref_clock = adev->clock.spll.reference_freq; + info->mode_info++; + } + } + } + + return 0; +} + /** \brief evaluate acpi namespace object, handle or pathname must be valid * \param cgs_device * \param info input/output arguments for the control method @@ -1006,6 +1045,7 @@ static const struct cgs_ops amdgpu_cgs_ops = { amdgpu_cgs_get_firmware_info, amdgpu_cgs_set_powergating_state, amdgpu_cgs_set_clockgating_state, + amdgpu_cgs_get_active_displays_info, amdgpu_cgs_call_acpi_method, amdgpu_cgs_query_system_info, }; diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h index 5ea8db0..2bbffd1 100644 --- a/drivers/gpu/drm/amd/include/cgs_common.h +++ b/drivers/gpu/drm/amd/include/cgs_common.h @@ -142,6 +142,18 @@ struct cgs_firmware_info { void *kptr; }; +struct cgs_mode_info { + uint32_t refresh_rate; + uint32_t ref_clock; + uint32_t vblank_time_us; +}; + +struct cgs_display_info { + uint32_t display_count; + uint32_t active_display_mask; + struct cgs_mode_info *mode_info; +}; + typedef unsigned long cgs_handle_t; #define CGS_ACPI_METHOD_ATCS 0x53435441 @@ -541,6 +553,10 @@ typedef int(*cgs_set_clockgating_state)(void *cgs_device, enum amd_ip_block_type block_type, enum amd_clockgating_state state); +typedef int(*cgs_get_active_displays_info)( + void *cgs_device, + struct cgs_display_info *info); + typedef int (*cgs_call_acpi_method)(void *cgs_device, uint32_t acpi_method, uint32_t acpi_function, @@ -592,6 +608,8 @@ struct cgs_ops { /* cg pg interface*/ cgs_set_powergating_state set_powergating_state; cgs_set_clockgating_state set_clockgating_state; + /* display manager */ + cgs_get_active_displays_info get_active_displays_info; /* ACPI */ cgs_call_acpi_method call_acpi_method; /* get system info */ @@ -682,6 +700,8 @@ struct cgs_device CGS_CALL(set_powergating_state, dev, block_type, state) #define cgs_set_clockgating_state(dev, block_type, state) \ CGS_CALL(set_clockgating_state, dev, block_type, state) +#define cgs_get_active_displays_info(dev, info) \ + CGS_CALL(get_active_displays_info, dev, info) #define cgs_call_acpi_method(dev, acpi_method, acpi_function, pintput, poutput, output_count, input_size, output_size) \ CGS_CALL(call_acpi_method, dev, acpi_method, acpi_function, pintput, poutput, output_count, input_size, output_size) #define cgs_query_system_info(dev, sys_info) \