From patchwork Fri Nov 20 08:15:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 7665051 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3A4BCBF90C for ; Fri, 20 Nov 2015 08:16:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6706920497 for ; Fri, 20 Nov 2015 08:16:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8F1E420490 for ; Fri, 20 Nov 2015 08:16:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E1C5A6EA52; Fri, 20 Nov 2015 00:16:23 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ig0-f193.google.com (mail-ig0-f193.google.com [209.85.213.193]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5690D6EA52 for ; Fri, 20 Nov 2015 00:16:23 -0800 (PST) Received: by igbgg5 with SMTP id gg5so809390igb.2 for ; Fri, 20 Nov 2015 00:16:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4oowtdOiBqojhsg7LSkMykl2TRjLIf+Pv26lUEXNviI=; b=NBgmfrGIx0l5t4U+GlWzdvDwuk9iQbVVgb3ZpH3JMdgBEXSFiPEoSXYNC87QypnU3P oLSJmgH+1V6fDGjRhQdalpJYNu8EzSXhg99XquDs0oLfDY6D10xPqGd9PaVQt2n13Ije B5hkqbL7FM1qwuv/lQKTBp7kCW7YutMg5e2Fiy8vDyuX0foMXG8VqC0IekTlBmIN3Ixy mmqFXg0Hp7xIt/Y5GoMWxqr8dzIeMmBpy3x+qZOxM1Lo4Ken4zmb1iUcqODfZnHTMQ3H ugEayMvmVHZ9YkVQGb4D2XXbLaWQFEzeYNDNAxgN8T2RfAkIM6DEmiu8p5rpX3GZF6/k TRVQ== X-Received: by 10.50.27.9 with SMTP id p9mr599613igg.28.1448007382793; Fri, 20 Nov 2015 00:16:22 -0800 (PST) Received: from localhost.localdomain ([45.74.60.24]) by smtp.gmail.com with ESMTPSA id b10sm696026igx.19.2015.11.20.00.16.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Nov 2015 00:16:21 -0800 (PST) From: Chris Zhong To: heiko@sntech.de, linux-rockchip@lists.infradead.org, mark.yao@rock-chips.com, treding@nvidia.com, emil.l.velikov@gmail.com Subject: [PATCH v4 02/13] clk: rockchip: add mipidsi clocks on rk3288 Date: Fri, 20 Nov 2015 16:15:28 +0800 Message-Id: <1448007339-10966-3-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> References: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> Cc: Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, Chris Zhong , rmk+kernel@arm.linux.org.uk, ajaykumar.rs@samsung.com, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP sclk_mipidsi_24m is the gating of mipi dsi phy. Signed-off-by: Chris Zhong --- Changes in v4: None Changes in v3: None Changes in v2: None drivers/clk/rockchip/clk-rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 9040878..c7d7ebf 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS), GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS), GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS), - GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), + GATE(SCLK_MIPI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), /* sclk_gpu gates */ GATE(ACLK_GPU, "aclk_gpu", "sclk_gpu", 0, RK3288_CLKGATE_CON(18), 0, GFLAGS),