From patchwork Thu Dec 3 11:37:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 7758931 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F26C39FCBB for ; Thu, 3 Dec 2015 11:29:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 30FD620499 for ; Thu, 3 Dec 2015 11:29:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CCF15205B7 for ; Thu, 3 Dec 2015 11:29:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 27F9A7A141; Thu, 3 Dec 2015 03:29:15 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id DDD597A141; Thu, 3 Dec 2015 03:29:13 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP; 03 Dec 2015 03:29:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,378,1444719600"; d="scan'208";a="6790444" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by fmsmga004.fm.intel.com with ESMTP; 03 Dec 2015 03:29:06 -0800 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, jim.bish@intel.com, robert.bradford@intel.com, matthew.d.roper@intel.com Subject: [PATCH v8 24/25] drm/i915: disable plane gamma Date: Thu, 3 Dec 2015 17:07:00 +0530 Message-Id: <1449142621-16602-25-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1449142621-16602-1-git-send-email-shashank.sharma@intel.com> References: <1449142621-16602-1-git-send-email-shashank.sharma@intel.com> Cc: avinash.reddy.palleti@intel.com, emil.l.velikov@gmail.com, kausalmalladi@gmail.com, =gary.k.smith@intel.com, daniel.vetter@intel.com, kiran.s.kumar@intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In plane enabling sequence, plane gamma bit is by default enabled. Plane gamma gets higher priority than pipe gamma, if both enabled. This patch disables plane gamma from sequence. If required, plane gamma can be enabled via the color manager drm interface. Signed-off-by: Shashank Sharma Signed-off-by: Kumar, Kiran S --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_sprite.c | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1ae601a..98dd5ad 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2816,7 +2816,7 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc, pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); - dspcntr = DISPPLANE_GAMMA_ENABLE; + dspcntr = (DISPPLANE_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE); dspcntr |= DISPLAY_PLANE_ENABLE; diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 2b96f33..b9dfeb0 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -203,7 +203,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, plane_ctl = PLANE_CTL_ENABLE | PLANE_CTL_PIPE_GAMMA_ENABLE | - PLANE_CTL_PIPE_CSC_ENABLE; + PLANE_CTL_PIPE_CSC_ENABLE | + PLANE_CTL_PLANE_GAMMA_DISABLE; plane_ctl |= skl_plane_ctl_format(fb->pixel_format); plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]); @@ -402,7 +403,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc, * Enable gamma to match primary/cursor plane behaviour. * FIXME should be user controllable via propertiesa. */ - sprctl |= SP_GAMMA_ENABLE; + sprctl |= (SP_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE); if (obj->tiling_mode != I915_TILING_NONE) sprctl |= SP_TILED; @@ -521,7 +522,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, * Enable gamma to match primary/cursor plane behaviour. * FIXME should be user controllable via propertiesa. */ - sprctl |= SPRITE_GAMMA_ENABLE; + sprctl |= (SPRITE_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE); if (obj->tiling_mode != I915_TILING_NONE) sprctl |= SPRITE_TILED;