From patchwork Wed Jan 6 10:19:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 7965731 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9B4339F1CC for ; Wed, 6 Jan 2016 10:19:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BD9AA2017E for ; Wed, 6 Jan 2016 10:19:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D1E322017D for ; Wed, 6 Jan 2016 10:19:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C3BC6E51E; Wed, 6 Jan 2016 02:19:37 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (down.free-electrons.com [37.187.137.238]) by gabe.freedesktop.org (Postfix) with ESMTP id C1EC46E34E for ; Wed, 6 Jan 2016 02:19:35 -0800 (PST) Received: by mail.free-electrons.com (Postfix, from userid 110) id 89B7B2FE; Wed, 6 Jan 2016 11:19:32 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (AToulouse-657-1-1146-72.w92-156.abo.wanadoo.fr [92.156.180.72]) by mail.free-electrons.com (Postfix) with ESMTPSA id 2D74B2BB; Wed, 6 Jan 2016 11:19:32 +0100 (CET) From: Boris Brezillon To: David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org Subject: [PATCH 5/8] drm: atmel-hlcdc: support extended timing ranges on sama5d4 and sama5d2 Date: Wed, 6 Jan 2016 11:19:26 +0100 Message-Id: <1452075569-8545-6-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1452075569-8545-1-git-send-email-boris.brezillon@free-electrons.com> References: <1452075569-8545-1-git-send-email-boris.brezillon@free-electrons.com> Cc: Jean-Christophe Plagniol-Villard , Alexandre Belloni , Nicolas Ferre , linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The display timings on old SoCs older than the sama5d4 are quite limited and prevent the use of many displays. Add support for extended timing ranges on sama5d2 and sama5d4. Signed-off-by: Boris Brezillon Acked-by: Nicolas Ferre --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 24 ++++++++++++++++++------ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 6 ++++++ 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index d760475..66f97e1 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -50,6 +50,9 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9n12 = { .min_height = 0, .max_width = 1280, .max_height = 860, + .max_spw = 0x3f, + .max_vpw = 0x3f, + .max_hpw = 0xff, .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9n12_layers), .layers = atmel_hlcdc_at91sam9n12_layers, }; @@ -134,6 +137,9 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9x5 = { .min_height = 0, .max_width = 800, .max_height = 600, + .max_spw = 0x3f, + .max_vpw = 0x3f, + .max_hpw = 0xff, .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9x5_layers), .layers = atmel_hlcdc_at91sam9x5_layers, }; @@ -237,6 +243,9 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d3 = { .min_height = 0, .max_width = 2048, .max_height = 2048, + .max_spw = 0x3f, + .max_vpw = 0x3f, + .max_hpw = 0x1ff, .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d3_layers), .layers = atmel_hlcdc_sama5d3_layers, }; @@ -320,6 +329,9 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d4 = { .min_height = 0, .max_width = 2048, .max_height = 2048, + .max_spw = 0xff, + .max_vpw = 0xff, + .max_hpw = 0x3ff, .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d4_layers), .layers = atmel_hlcdc_sama5d4_layers, }; @@ -358,19 +370,19 @@ int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc, int hback_porch = mode->htotal - mode->hsync_end; int hsync_len = mode->hsync_end - mode->hsync_start; - if (hsync_len > 0x40 || hsync_len < 1) + if (hsync_len > dc->desc->max_spw + 1 || hsync_len < 1) return MODE_HSYNC; - if (vsync_len > 0x40 || vsync_len < 1) + if (vsync_len > dc->desc->max_spw + 1 || vsync_len < 1) return MODE_VSYNC; - if (hfront_porch > 0x200 || hfront_porch < 1 || - hback_porch > 0x200 || hback_porch < 1 || + if (hfront_porch > dc->desc->max_hpw + 1 || hfront_porch < 1 || + hback_porch > dc->desc->max_hpw + 1 || hback_porch < 1 || mode->hdisplay < 1) return MODE_H_ILLEGAL; - if (vfront_porch > 0x40 || vfront_porch < 1 || - vback_porch > 0x40 || vback_porch < 0 || + if (vfront_porch > dc->desc->max_vpw + 1 || vfront_porch < 1 || + vback_porch > dc->desc->max_vpw || vback_porch < 0 || mode->vdisplay < 1) return MODE_V_ILLEGAL; diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h index 6a762c9..864791e 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h @@ -50,6 +50,9 @@ * @min_height: minimum height supported by the Display Controller * @max_width: maximum width supported by the Display Controller * @max_height: maximum height supported by the Display Controller + * @max_spw: maximum vertical/horizontal pulse width + * @max_vpw: maximum vertical back/front porch width + * @max_hpw: maximum horizontal back/front porch width * @layers: a layer description table describing available layers * @nlayers: layer description table size */ @@ -58,6 +61,9 @@ struct atmel_hlcdc_dc_desc { int min_height; int max_width; int max_height; + int max_spw; + int max_vpw; + int max_hpw; const struct atmel_hlcdc_layer_desc *layers; int nlayers; };