From patchwork Tue Jan 12 18:05:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Keeping X-Patchwork-Id: 8020121 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 84ED2BEEE5 for ; Tue, 12 Jan 2016 18:22:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A48E5203DF for ; Tue, 12 Jan 2016 18:22:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CF53820340 for ; Tue, 12 Jan 2016 18:22:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4ED06E426; Tue, 12 Jan 2016 10:22:05 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org X-Greylist: delayed 962 seconds by postgrey-1.34 at gabe; Tue, 12 Jan 2016 10:22:04 PST Received: from metanate.com (dougal.metanate.com [90.155.101.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id CCBB96E426 for ; Tue, 12 Jan 2016 10:22:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=simple/simple; d=metanate.com; s=stronger; h=Message-Id:Date:Subject:Cc:To:From; bh=rwtC7owEuHQwF2wmy4Bm6RN45n74ahexQ78Hsd5hjA4=; b=ghW7HY8tz+jRok3M0PsuTE7eOW5HG6YK3esXGNxtfSZyVEb4Q3EIJci7Eq0FPPoBMhLmV3KAkleiDuWaUuzUXbNWS4lbeWQyKx43S8O+oySEX3KWvd4Lq5D71YE+o3zea5jd2IucMSxIg5rUtN0u9TQSsSjj2jTemXp+p0rou6gKCVYOwMyOiAwPmYHzKutZcegl0IhbxauAckWRWsQdyr3NLE8lyRtEEXXRnQqpNYy4DQeDxU3yY/0XDcfm3pSXP/a7WdB1cpG9JNwl9bVx0Xtrp3+2ghq6So3gjq5EKRGBs9KyulztpwZrzRgj2Kdt8GPJeQjAnlTYedn5L/4bOA==; Received: from brian ([192.168.88.1] helo=leela.metanate.com) by shrek.metanate.com with esmtpsa (TLSv1.2:AES128-SHA256:128) (Exim 4.83_RC2) (envelope-from ) id 1aJ3KH-0000LP-JP; Tue, 12 Jan 2016 18:05:49 +0000 From: John Keeping To: Mark Yao Subject: [PATCH] drm/rockchip: vop: fix mask when updating interrupts Date: Tue, 12 Jan 2016 18:05:18 +0000 Message-Id: <1452621918-32239-1-git-send-email-john@metanate.com> X-Mailer: git-send-email 2.7.0.rc3.140.g520a093 Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Commit dbb3d94 (drm/rockchip: vop: move interrupt registers into vop_data) introduced new macros for updating the interrupt control registers but these always use the mask from the register definition without refining it for the particular bits that are being changed. This means that whenever we enable/disable a particular interrupt we end up disabling all of the others as a side effect. Signed-off-by: John Keeping --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 46c2a8d..fd37054 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -43,8 +43,8 @@ #define REG_SET(x, base, reg, v, mode) \ __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) -#define REG_SET_MASK(x, base, reg, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) +#define REG_SET_MASK(x, base, reg, mask, v, mode) \ + __REG_SET_##mode(x, base + reg.offset, mask, reg.shift, v) #define VOP_WIN_SET(x, win, name, v) \ REG_SET(x, win->base, win->phy->name, v, RELAXED) @@ -58,16 +58,18 @@ #define VOP_INTR_GET(vop, name) \ vop_read_reg(vop, 0, &vop->data->ctrl->name) -#define VOP_INTR_SET(vop, name, v) \ - REG_SET(vop, 0, vop->data->intr->name, v, NORMAL) +#define VOP_INTR_SET(vop, name, mask, v) \ + REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL) #define VOP_INTR_SET_TYPE(vop, name, type, v) \ do { \ - int i, reg = 0; \ + int i, reg = 0, mask = 0; \ for (i = 0; i < vop->data->intr->nintrs; i++) { \ - if (vop->data->intr->intrs[i] & type) \ + if (vop->data->intr->intrs[i] & type) { \ reg |= (v) << i; \ + mask |= 1 << i; \ + } \ } \ - VOP_INTR_SET(vop, name, reg); \ + VOP_INTR_SET(vop, name, mask, reg); \ } while (0) #define VOP_INTR_GET_TYPE(vop, name, type) \ vop_get_intr_type(vop, &vop->data->intr->name, type)