From patchwork Tue Feb 23 06:25:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 8387631 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C7F3BC0553 for ; Tue, 23 Feb 2016 06:26:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 00CB8205C2 for ; Tue, 23 Feb 2016 06:26:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 377EC2038E for ; Tue, 23 Feb 2016 06:26:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C258C6E328; Tue, 23 Feb 2016 06:26:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from hqemgate14.nvidia.com (hqemgate14.nvidia.com [216.228.121.143]) by gabe.freedesktop.org (Postfix) with ESMTPS id A1FB36E329 for ; Tue, 23 Feb 2016 06:26:10 +0000 (UTC) Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Mon, 22 Feb 2016 22:25:38 -0800 Received: from hqemhub03.nvidia.com ([172.20.150.15]) by hqnvupgp07.nvidia.com (PGP Universal service); Mon, 22 Feb 2016 22:25:07 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 22 Feb 2016 22:25:07 -0800 Received: from percival.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.406.0; Mon, 22 Feb 2016 22:26:09 -0800 From: Alexandre Courbot To: Thierry Reding , =?UTF-8?q?Terje=20Bergstr=C3=B6m?= , Stephen Warren Subject: [PATCH 2/2] drm/tegra: Set the DMA mask Date: Tue, 23 Feb 2016 15:25:54 +0900 Message-ID: <1456208754-12362-2-git-send-email-acourbot@nvidia.com> X-Mailer: git-send-email 2.7.1 In-Reply-To: <1456208754-12362-1-git-send-email-acourbot@nvidia.com> References: <1456208754-12362-1-git-send-email-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Cc: linux-tegra@vger.kernel.org, gnurou@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The default DMA mask covers a 32 bits address range, but tegradrm can address more than that. Set the DMA mask to the actual addressable range to avoid the use of unneeded bounce buffers. Signed-off-by: Alexandre Courbot Signed-off-by: Alexandre Courbot --- Thierry, >> I --- Thierry, I am not absolutely sure whether the size is correct and applies to all Tegra generations - please let me know if this needs to be reworked. drivers/gpu/drm/tegra/drm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index bc0555adecaf..503fc9e73521 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c @@ -992,6 +992,7 @@ static int host1x_drm_probe(struct host1x_device *dev) dev_set_drvdata(&dev->dev, drm); of_dma_configure(drm->dev, NULL); + dma_set_mask(drm->dev, DMA_BIT_MASK(34)); err = drm_dev_register(drm, 0); if (err < 0)