From patchwork Thu Feb 25 10:00:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 8421621 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1C4A89F52D for ; Thu, 25 Feb 2016 10:01:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 32FB92035B for ; Thu, 25 Feb 2016 10:01:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BBCD2202EB for ; Thu, 25 Feb 2016 10:01:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EFF376E735; Thu, 25 Feb 2016 10:01:21 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from hqemgate15.nvidia.com (hqemgate15.nvidia.com [216.228.121.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 24A506E72E for ; Thu, 25 Feb 2016 10:01:19 +0000 (UTC) Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Thu, 25 Feb 2016 02:01:04 -0800 Received: from hqemhub03.nvidia.com ([172.20.150.15]) by hqnvupgp08.nvidia.com (PGP Universal service); Thu, 25 Feb 2016 02:01:09 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 25 Feb 2016 02:01:09 -0800 Received: from percival.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.406.0; Thu, 25 Feb 2016 02:01:18 -0800 From: Alexandre Courbot To: Thierry Reding , =?UTF-8?q?Terje=20Bergstr=C3=B6m?= , Stephen Warren Subject: [PATCH v3 2/2] gpu: host1x: Set the DMA mask for host1x devices Date: Thu, 25 Feb 2016 19:00:58 +0900 Message-ID: <1456394458-15759-2-git-send-email-acourbot@nvidia.com> X-Mailer: git-send-email 2.7.1 In-Reply-To: <1456394458-15759-1-git-send-email-acourbot@nvidia.com> References: <1456394458-15759-1-git-send-email-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Cc: linux-tegra@vger.kernel.org, gnurou@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The default DMA mask covers a 32 bits address range, but devices can address more than that. Set the DMA mask to the actual addressable range to avoid the use of unneeded bounce buffers. Signed-off-by: Alexandre Courbot --- Changes since v1: - set the mask at the bus level so of_dma_configure() does the right thing drivers/gpu/host1x/bus.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c index c27858ae0552..e04c7114f976 100644 --- a/drivers/gpu/host1x/bus.c +++ b/drivers/gpu/host1x/bus.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "bus.h" #include "dev.h" @@ -394,7 +395,7 @@ static int host1x_device_add(struct host1x *host1x, INIT_LIST_HEAD(&device->list); device->driver = driver; - device->dev.coherent_dma_mask = host1x->dev->coherent_dma_mask; + device->dev.coherent_dma_mask = DMA_BIT_MASK(34); device->dev.dma_mask = &device->dev.coherent_dma_mask; dev_set_name(&device->dev, "%s", driver->driver.name); of_dma_configure(&device->dev, host1x->dev->of_node);